公开(公告)号：US20250036315A1

公开(公告)日：2025-01-30

申请号：US18359729

申请日：2023-07-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sriramakrishnan Govindarajan ,  Vignesh Raghavendra ,  Mihir Mody ,  Mohammad Asif Farooqui ,  Shailesh Ghotgalkar ,  Sai Rajaraman

IPC: G06F3/06

Abstract: Various examples disclosed herein relate to trimming of system elements to prepare the elements for execution of boot code and application code. In an example embodiment, a system is provided. The system includes memory access circuitry and processing circuitry coupled to the memory access circuitry. The memory access circuitry is configured to receive a read request corresponding to a set of instructions for execution by processing circuitry stored in non-volatile memory, determine whether to preempt current access to the non-volatile memory corresponding to one or more access requests in favor of the read request based on a priority of the read request relative to the one or more access requests, obtain the set of instructions from the non-volatile memory, and supply the set of instructions to the processing circuitry. The processing circuitry executes the set of instructions.

公开(公告)号：US20230205305A1

公开(公告)日：2023-06-29

申请号：US18060114

申请日：2022-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Kowkutla ,  Chunhua Hu ,  Raghavendra Santhanagopal ,  Kazunobu Shin ,  Charles Gerlach ,  Rejitha Nair ,  Ritesh Sojitra ,  Sai Rajaraman ,  Anthony Seely ,  Siva Srinivas Kothamasu ,  Varun Singh ,  John Apostol

IPC: G06F1/3287 ,  G06F13/16 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F1/3287 ,  G06F13/1668 ,  G06F13/4068 ,  G06F13/423

Abstract: A circuit device is provided and includes a first power domain comprising a universal serial bus (USB) subsystem and/or a memory controller subsystem. The first power domain is configured to isolate the USB subsystem and/or the memory controller subsystem from a power-on-reset signal asserted during a low power mode.