公开(公告)号：US10583461B2

公开(公告)日：2020-03-10

申请号：US15852018

申请日：2017-12-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Aravind Miriyala ,  Naveen Kumar Ginige ,  Vajeed Nimran ,  Saugata Datta ,  Shabbir Amjhera Wala

IPC: B06B1/02 ,  H03K17/687 ,  A61B8/00

Abstract: A semiconductor device includes a trim storage and an encoder. The trim storage stores trim values. The encoder determines a magnitude of a supply voltage, determines a magnitude of a handle voltage, determines a source-to-handle voltage of a first transistor, and determines a source-to-handle voltage of a second transistor. Further, the encoder determines a target number of selectable first transistor units comprising the first transistor to select for the first transistor. Based on a trim value from the trim storage, the source-to-handle voltage of the first transistor and the source-to-handle voltage of the second transistor, the encoder determines a target number of selectable second transistor units comprising the second transistor to select for the second transistor. The encoder asserts control signals to select the target number of selectable first transistor units and the target number of selectable second transistor units.

公开(公告)号：US20240106404A1

公开(公告)日：2024-03-28

申请号：US17955503

申请日：2022-09-28

Applicant: Texas Instruments Incorporated

Inventor： Nagesh Surendranath ,  Eduardo Bartolome ,  Saugata Datta

IPC: H03G1/04 ,  H03F1/26 ,  H03F3/45 ,  H03G3/30

CPC classification number: H03G1/04 ,  H03F1/26 ,  H03F3/45475 ,  H03G3/3031

Abstract: A circuit includes a plurality of first stage integrators. Each of the plurality of first stage integrators includes a first input, a second input, a third input and an output. The first input of each of the plurality of first stage integrators is coupled to a different one of circuit inputs, the second input is coupled to a first reference input, the third input is coupled to a second reference input and the output of each of the plurality of first stage integrators is coupled to the first input of such first stage integrator. The circuit includes a second stage integrator which includes a first input coupled to each of the first inputs of the plurality of first stage integrators, a second input coupled to the first reference input, and an output coupled to the first input of the second stage integrator.

公开(公告)号：US11901864B1

公开(公告)日：2024-02-13

申请号：US18088951

申请日：2022-12-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sravana Kumar Goli ,  Nagesh Surendranath ,  Saugata Datta ,  Sandeep Oswal

IPC: H03B5/12 ,  H03M7/12 ,  G01J1/42 ,  H03K5/24 ,  H03L7/081 ,  G01S17/894

CPC classification number: H03B5/1243 ,  G01J1/42 ,  G01S17/894 ,  H03K5/24 ,  H03L7/0812 ,  H03M7/12

Abstract: A circuit includes an amplifier having an input and an output. A voltage comparator has an input and first and second outputs. The input of the voltage comparator is coupled to the output of the amplifier. A variable capacitor circuit is coupled between the input and the output of the amplifier and is coupled to the first output of the voltage comparator. A charge dump circuit has an input and an output. The input of the charge dump circuit is coupled to the second output of the voltage comparator. The output of the charge dump circuit is coupled to the input of the amplifier.