公开(公告)号：US20190296695A1

公开(公告)日：2019-09-26

申请号：US15934467

申请日：2018-03-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shyamsunder BALASUBRAMANIAN ,  Wenxiao TAN ,  Mayank GARG ,  Toru TANAKA

IPC: H03F1/30 ,  H03F3/04

Abstract: An offset drift compensation circuit for correcting offset drift that changes with temperature. In one example, offset drift compensation circuit includes a low temperature offset compensation circuit and a high temperature offset circuit. The low temperature offset compensation circuit is configured to compensate for drift in offset at a first rate below a selected temperature. The high temperature offset compensation circuit is configured to compensate for drift in offset at a second rate above the selected temperature. The first rate is different from the second rate.

公开(公告)号：US20170317625A1

公开(公告)日：2017-11-02

申请号：US15142219

申请日：2016-04-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Alejandro VERA ,  Shyamsunder BALASUBRAMANIAN ,  Toshio YAMANAKA ,  Toru TANAKA

IPC: H02P8/12 ,  G05F1/595

CPC classification number: H02P8/12 ,  G05F1/595 ,  H02P8/36 ,  H02P29/02

Abstract: A voltage regulator includes an output transistor, an error amplifier coupled to the output transistor, a cascode transistor coupled to the output transistor in series, and a cascode bias circuit coupled to the cascode transistor and the output transistor. The output transistor is configured to generate an output signal at a first voltage. The error amplifier is configured to receive a reference signal. The cascode bias circuit is configured to bias the cascode transistor such that, in response to a drain-to-source short circuit of the output transistor, the cascode transistor generates the output signal at the first voltage.

公开(公告)号：US20170317638A1

公开(公告)日：2017-11-02

申请号：US15143030

申请日：2016-04-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Toshio YAMANAKA ,  Shyamsunder BALASUBRAMANIAN ,  Toru TANAKA ,  Mayank GARG

IPC: H02P31/00 ,  H02H7/09 ,  H02H7/08

CPC classification number: H02P31/00 ,  B60L3/00 ,  G06F1/28 ,  H02H7/0844 ,  H02H7/09

Abstract: An apparatus includes a control circuit that includes a configuration register and configured to receive a configuration setting across an external bus. The configuration setting encodes a first voltage state for the apparatus. The control circuit includes an input configured to be coupled to an external electrical device. The control circuit is configured to determine a value of the external device that maps to a second voltage state for the apparatus. The control logic is configured to transition the apparatus to a safe mode upon a determination that the first voltage state does not match the second voltage state.

公开(公告)号：US20230100060A1

公开(公告)日：2023-03-30

申请号：US17489233

申请日：2021-09-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shyamsunder BALASUBRAMANIAN ,  Kuangyu CHIANG ,  Toshio YAMANAKA ,  Luis Eduardo Ossa

IPC: H02M3/07 ,  H03K17/06 ,  H02M1/32 ,  H02M1/08

Abstract: A device includes a charge pump configured to provide a current to a bootstrap capacitor responsive to a charge pump switch being closed. The device also includes a current limiter coupled in series between the charge pump switch and the charge pump. The current limiter is configured to receive a control signal from a controller that indicates whether the device is to operate in a first mode or in a second mode; responsive to the control signal indicating the first mode, allow a first value of current to the charge pump switch; and, responsive to the control signal indicating the second mode, limit the current to the charge pump switch to a second value. The second value is less than the first value.

公开(公告)号：US20230067055A1

公开(公告)日：2023-03-02

申请号：US17463001

申请日：2021-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shyamsunder BALASUBRAMANIAN ,  Michael Edwin BUTENHOFF ,  Toshio YAMANAKA

IPC: H03K3/013 ,  H03K3/012 ,  H03K3/356

Abstract: A system includes a level shifter coupled to a voltage source, a first transistor, and a second transistor. The system also includes a first current source coupled to the first transistor and the second transistor and configured to bias the first transistor and the second transistor. The system includes a slew detector coupled to the voltage source and to the first current source, where the slew detector is configured to detect a change in voltage of the voltage source, and further configured to provide current to the first current source responsive to detecting the change. The system also includes a second current source coupled in parallel to the first current source, where the second current source is configured to provide current to the first current source responsive to a control signal.

公开(公告)号：US20170317619A1

公开(公告)日：2017-11-02

申请号：US15142852

申请日：2016-04-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shyamsunder BALASUBRAMANIAN ,  Toshio YAMANAKA ,  Toru TANAKA ,  Mayank GARG

IPC: H02P6/12 ,  H03K17/687

Abstract: A gate driver circuit includes a comparator and a gate driver. The comparator is configured to detect a short circuit in a first power field effect transistor (FET). The gate driver is configured to drive a gate of the first power FET by generating a first signal at a first drive current. In response to the comparator detecting a short circuit in the first power FET, the gate driver is further configured to pulse the first signal at a first pulldown current. After the pulse has ended, the gate driver is further configured to drive the gate of the first power FET at a first hold current. The first hold current is less than the first pulldown current.