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公开(公告)号:US10782717B1
公开(公告)日:2020-09-22
申请号:US16656742
申请日:2019-10-18
Applicant: Texas Instruments Incorporated
Inventor: Jikai Chen , Yonghui Tang , Yuan Rao , Huanzhang Huang , Yanli Fan
Abstract: A jitter compensation circuit operates in a first conduction state responsive to a high-to low transition of data and a low-to-high transition of data. The circuit operates in a second conduction state when there is no transition of data. The circuit compensates charge to a voltage supply in the first conduction state, thereby reducing voltage drop caused by transition of data.
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公开(公告)号:US09800235B2
公开(公告)日:2017-10-24
申请号:US14725001
申请日:2015-05-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Yonghui Tang , M D Anwar Sadat , Hao Liu
IPC: H03K5/1534 , H03K5/26 , H03K19/003
CPC classification number: H03K5/1534 , H03K5/26 , H03K6/04 , H03K19/00315
Abstract: A signal conditioner that includes a transition-detection module and a current-injection module. The transition-detection module is configured to receive a pair of differential signals from a data line and generate one or more comparator output signals and a transition-indication signal to indicate whether a transition has been detected on the differential signals. The current-injection module is configured to receive the comparator output signals and transition-indication signal from the transition-detection module, and generate appropriate currents for injection into the data line to boost edge rates of the differential signals when the transition-detection module detects a transition of the differential signals or remain high impedance when no transition occurs on the differential signals.
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公开(公告)号:US09710411B2
公开(公告)日:2017-07-18
申请号:US13963264
申请日:2013-08-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Win Naing Maung , Yonghui Tang , Suzanne Mary Vining , Hao Liu
CPC classification number: G06F13/385
Abstract: A signal conditioner can include a state machine configured to detect a predetermined protocol level mode of a data signal on a bi-directional serial bus. The signal conditioner can also include a re-driver configured to inject current into at least one of a rising edge and a falling edge of the data signal on the bi-directional serial bus in response to the detection of the predetermined protocol level mode.
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公开(公告)号:US11580053B2
公开(公告)日:2023-02-14
申请号:US17347920
申请日:2021-06-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Win Naing Maung , Suzanne Mary Vining , Yonghui Tang , Douglas Edward Wente , Huanzhang Huang
IPC: G06F13/42
Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.
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公开(公告)号:US10972081B2
公开(公告)日:2021-04-06
申请号:US16804061
申请日:2020-02-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Yanfei Jiang , Huanzhang Huang , Yonghui Tang , Shita Guo
IPC: H03K5/00 , H03K5/1252 , H03K19/20 , H03K19/0175 , G05F1/46
Abstract: Aspects of the disclosure provide for a method. In some examples, the method includes detecting a transition in an input signal (IN), generating a bias current based on the detected transition in IN, and modifying a charge status of a capacitor based on the charge current. The method further includes generating an output signal (OUT) based on the charge status of the capacitor, disabling the bias current generation based on values of IN and OUT, and strongly pulling the capacitor up or down based on the disabling the bias current generation.
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公开(公告)号:US10733129B2
公开(公告)日:2020-08-04
申请号:US15967883
申请日:2018-05-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Yonghui Tang , Yanli Fan
Abstract: In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.
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公开(公告)号:US20240402739A1
公开(公告)日:2024-12-05
申请号:US18677325
申请日:2024-05-29
Applicant: Texas Instruments Incorporated
Inventor: Win N. Maung , Saminah Chaudhry , Yonghui Tang
Abstract: An example apparatus includes: a bus connection including a common terminal; a first data terminal; and a second data terminal; an amplifier having an input terminal and an output terminal, the input terminal of the amplifier coupled to the common terminal; charge pump circuitry having an input terminal, a first output terminal, and a second output terminal, the input terminal of the charge pump circuitry coupled to the output terminal of the amplifier; receiver circuitry having an input terminal, a first supply terminal, and a second supply terminal, the input terminal of the receiver circuitry coupled to the first data terminal; and transmitter circuitry having an output terminal, a first supply terminal, and a second supply terminal, the output terminal of the transmitter circuitry coupled to the second data terminal, the first supply terminal of the transmitter circuitry coupled to the first output terminal of the charge pump circuitry.
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公开(公告)号:US11068435B2
公开(公告)日:2021-07-20
申请号:US16751411
申请日:2020-01-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Win Naing Maung , Suzanne Mary Vining , Yonghui Tang , Douglas Edward Wente , Huanzhang Huang
IPC: G06F13/42
Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.
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公开(公告)号:US10394740B1
公开(公告)日:2019-08-27
申请号:US16126665
申请日:2018-09-10
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Shita Guo , Yanli Fan , Huanzhang Huang , Yonghui Tang , Yanfei Jiang
Abstract: An apparatus includes a transistor with a control terminal, a first current terminal, and a second current terminal. The apparatus also includes a charge pump coupled to the control terminal of the transistor via a first and second paths. The first path comprises a first resistor and the second path comprises a second resistor in series with a diode. The first resistor has a higher resistance value than the second resistor.
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公开(公告)号:US12026115B2
公开(公告)日:2024-07-02
申请号:US17968978
申请日:2022-10-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Yonghui Tang , Yanli Fan
IPC: G06F13/40 , G06F13/42 , H03K5/1534 , H03K5/24
CPC classification number: G06F13/4022 , G06F13/4063 , G06F13/4282 , G06F13/4295 , G06F2213/0042 , H03K5/1534 , H03K5/24
Abstract: In an embodiment, a current source is coupled to a first current terminal of a switch, the second current terminal of which is coupled to a first data line in a communication system. An edge detector has a first input, a second input, and an output, in which the first input is coupled to a second data line in the communication system, the second input is coupled to the first data line, and the output is coupled to a control terminal of the switch. The first and second data lines may be positive and negative data lines, respectively, of the communication system.
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