公开(公告)号：US20240113095A1

公开(公告)日：2024-04-04

申请号：US18067703

申请日：2022-12-17

Applicant: Texas Instruments Incorporated

Inventor： Yoshihiro Takei ,  Mitsuhiro Sugimoto ,  Byron Lovell Williams ,  Jeffrey Alan West

IPC: H01L27/01 ,  H01L21/02 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L27/01 ,  H01L21/0214 ,  H01L21/02247 ,  H01L21/02252 ,  H01L23/3157 ,  H01L24/05 ,  H01L24/06 ,  H01L2224/05567 ,  H01L2224/06102

Abstract: A microelectronic device including an isolation device with a stabilized dielectric. The isolation device includes a lower isolation element, an upper isolation element, and an inorganic dielectric plateau between the lower isolation element and the upper isolation element. The dielectric sidewall of the inorganic dielectric plateau is stabilized in a nitrogen containing plasma which forms a SiOxNy surface on the dielectric sidewall of the inorganic dielectric plateau. The SiOxNy surface on the dielectric sidewall of the inorganic dielectric plateau reduces ingress of moisture into the dielectric stack of the inorganic dielectric plateau.

公开(公告)号：US20200312794A1

公开(公告)日：2020-10-01

申请号：US16832356

申请日：2020-03-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jeffrey Alan West ,  Thomas Dyer Bonifield ,  Yoshihiro Takei ,  Mitsuhiro Sugimoto

IPC: H01L23/64 ,  H01L25/18

Abstract: A microelectronic device contains a high voltage component having an upper plate and a lower plate. The upper plate is isolated from the lower plate by a main dielectric between the upper plate and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the upper plate and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer of silicon nitride having a refractive index between 2.11 and 2.23. The lower-bandgap dielectric layer extends beyond the upper plate continuously around the upper plate. The lower-bandgap dielectric layer has an isolation break surrounding the upper plate at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the upper plate.

公开(公告)号：US20240113096A1

公开(公告)日：2024-04-04

申请号：US18149099

申请日：2022-12-31

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey Alan West ,  Yoshihiro Takei ,  Mitsuhiro Sugimoto

IPC: H01L27/01

CPC classification number: H01L27/016

Abstract: A microelectronic device includes a lower isolation element and an upper isolation element, separated by an isolation dielectric layer stack. The microelectronic device includes a lower field reduction layer over the lower isolation element, under the isolation dielectric layer stack. The lower field reduction layer includes a first dielectric layer adjacent to the isolation dielectric layer stack, and a second dielectric layer over the first dielectric layer. A dielectric constant of the first dielectric layer is greater than a dielectric constant of the second dielectric layer. The dielectric constant of the second dielectric layer is greater than a dielectric constant of the isolation dielectric layer stack adjacent to the lower field reduction layer. Methods of forming example microelectronic device having lower field reduction layers are disclosed.

公开(公告)号：US20240113042A1

公开(公告)日：2024-04-04

申请号：US17958040

申请日：2022-09-30

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey Alan West ,  Thomas Dyer Bonifield ,  Toshiyuki Tamura ,  Yoshihiro Takei

IPC: H01L23/58 ,  H01L21/762 ,  H01L23/00 ,  H01L23/532 ,  H01L23/544

CPC classification number: H01L23/585 ,  H01L21/762 ,  H01L23/53295 ,  H01L23/544 ,  H01L24/06 ,  H01L2223/54426 ,  H01L2224/04042 ,  H01L2224/06102

Abstract: A microelectronic device including an isolation device. The isolation device includes a lower isolation element, an upper isolation element, and an inorganic dielectric plateau between the lower isolation element and the upper isolation element. The inorganic dielectric plateau contains an upper etch stop layer and a lower etch stop layer between the upper isolation element and the lower isolation element. The upper etch stop layer provides an end point signal during the plateau etch process which provides feedback on the amount of inorganic dielectric plateau which has been etched. The lower etch stop layer provides a traditional etch stop function to provide for a complete plateau etch and protection of an underlying metal bond pad. The inorganic dielectric plateau also contains alternating layers of high stress and low stress silicon dioxide, which provide a means of reinforcement of the inorganic dielectric plateau.

公开(公告)号：US10998278B2

公开(公告)日：2021-05-04

申请号：US16832356

申请日：2020-03-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jeffrey Alan West ,  Thomas Dyer Bonifield ,  Yoshihiro Takei ,  Mitsuhiro Sugimoto

IPC: H01L23/64 ,  H01L25/18

Abstract: A microelectronic device contains a high voltage component having an upper plate and a lower plate. The upper plate is isolated from the lower plate by a main dielectric between the upper plate and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the upper plate and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer of silicon nitride having a refractive index between 2.11 and 2.23. The lower-bandgap dielectric layer extends beyond the upper plate continuously around the upper plate. The lower-bandgap dielectric layer has an isolation break surrounding the upper plate at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the upper plate.