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公开(公告)号:US20190088719A1
公开(公告)日:2019-03-21
申请号:US15910786
申请日:2018-03-02
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Minoru ODA , Akira YOTSUMOTO , Kotaro NODA
IPC: H01L27/24 , H01L23/528 , H01L29/786 , H01L29/45 , H01L29/66
Abstract: A storage device including a transistor portion including a transistor, a plurality of interlayer insulating films provided above the transistor portion, a plurality of first conductive layers provided respectively between the plurality of interlayer insulating films, and a second conductive layer extending through the plurality of interlayer insulating films and the plurality of first conductive layers, the second conductive layer having one end electrically connected to the transistor portion, and a part that extends beyond a portion of the transistor portion.
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公开(公告)号:US20190296084A1
公开(公告)日:2019-09-26
申请号:US16123022
申请日:2018-09-06
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Shota MOMBETSU , Akira YOTSUMOTO , Tetsu MOROOKA , Mutsumi OKAJIMA
Abstract: A storage device includes a substrate; a plurality of insulating layers extending in a first direction; a plurality of first conductive layers extending in the first direction, and stacked alternately with the plurality of insulating layers along a second direction that intersects the first direction and is perpendicular to the substrate; a second conductive layer extending in the second direction; a recording layer provided between the second conductive layer and the plurality of first conductive layers; a first transistor electrically connected to the second conductive layer; a second transistor provided adjacent to the first transistor in a third direction that intersects the first direction and the second direction and is parallel to the substrate; and a first insulator provided on the second transistor.
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公开(公告)号:US20180277598A1
公开(公告)日:2018-09-27
申请号:US15705219
申请日:2017-09-14
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Minoru ODA , Akira YOTSUMOTO , Nobuyuki MOMO , Kotaro NODA
CPC classification number: H01L27/249 , H01L27/2454 , H01L45/085 , H01L45/1683
Abstract: A semiconductor device includes a semiconductor pillar and a control electrode. The semiconductor pillar extends in a first direction, and includes a first region, a second region and an intermediate region provided along the first direction. The intermediate region is positioned between the first region and the second region. The control electrode is disposed at a position so that the control electrode faces the intermediate region via an insulating film. The semiconductor pillar is provided so that a minimum width of the intermediate region in a second direction perpendicular to the first direction is narrower than a first width of the first region in the second direction and a second width of the second region in the second direction.
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