公开(公告)号：US20200075859A1

公开(公告)日：2020-03-05

申请号：US16676999

申请日：2019-11-07

Applicant: Toshiba Memory Corporation

Inventor： Kotaro NODA

IPC: H01L45/00 ,  H01L27/24

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of first interconnects extending in a first direction, a plurality of second interconnects extending in a second direction, a plurality of stacked films respectively provided between the first interconnects and the second interconnects, each of the plurality of stacked films including a variable resistance film, a first inter-layer insulating film provided in a first region between the stacked films, and a second inter-layer insulating film provided in a second region having a wider width than the first region. The second inter-layer insulating film includes a plurality of protrusions configured to support one portion of the plurality of second interconnects on the second region. A protruding length of the protrusions is less than a stacking height of the stacked films.

公开(公告)号：US20170294446A1

公开(公告)日：2017-10-12

申请号：US15630064

申请日：2017-06-22

Applicant: Toshiba Memory Corporation

Inventor： Kotaro NODA ,  Kyoko Noda ,  Aya Minemura ,  Kenji Sawamura

IPC: H01L27/11582 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11565 ,  H01L29/51

CPC classification number: H01L27/11582 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.

公开(公告)号：US20210202526A1

公开(公告)日：2021-07-01

申请号：US17204293

申请日：2021-03-17

Applicant: Toshiba Memory Corporation

Inventor： Kotaro NODA

IPC: H01L27/11582 ,  H01L27/1157

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

公开(公告)号：US20190088719A1

公开(公告)日：2019-03-21

申请号：US15910786

申请日：2018-03-02

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Minoru ODA ,  Akira YOTSUMOTO ,  Kotaro NODA

IPC: H01L27/24 ,  H01L23/528 ,  H01L29/786 ,  H01L29/45 ,  H01L29/66

Abstract: A storage device including a transistor portion including a transistor, a plurality of interlayer insulating films provided above the transistor portion, a plurality of first conductive layers provided respectively between the plurality of interlayer insulating films, and a second conductive layer extending through the plurality of interlayer insulating films and the plurality of first conductive layers, the second conductive layer having one end electrically connected to the transistor portion, and a part that extends beyond a portion of the transistor portion.

公开(公告)号：US20190013331A1

公开(公告)日：2019-01-10

申请号：US16132169

申请日：2018-09-14

Applicant: Toshiba Memory Corporation

Inventor： Kotaro NODA

IPC: H01L27/11582 ,  H01L27/1157

CPC classification number: H01L27/11582 ,  H01L27/1157

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

公开(公告)号：US20180205016A1

公开(公告)日：2018-07-19

申请号：US15922005

申请日：2018-03-15

Applicant: Toshiba Memory Corporation

Inventor： Kotaro NODA

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1675 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/148

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of first interconnects extending in a first direction, a plurality of second interconnects extending in a second direction, a plurality of stacked films respectively provided between the first interconnects and the second interconnects, each of the plurality of stacked films including a variable resistance film, a first inter-layer insulating film provided in a first region between the stacked films, and a second inter-layer insulating film provided in a second region having a wider width than the first region. The second inter-layer insulating film includes a plurality of protrusions configured to support one portion of the plurality of second interconnects on the second region. A protruding length of the protrusions is less than a stacking height of the stacked films.

公开(公告)号：US20190103557A1

公开(公告)日：2019-04-04

申请号：US16191618

申请日：2018-11-15

Applicant: Toshiba Memory Corporation

Inventor： Kotaro NODA

IPC: H01L45/00 ,  H01L27/24

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of first interconnects extending in a first direction, a plurality of second interconnects extending in a second direction, a plurality of stacked films respectively provided between the first interconnects and the second interconnects, each of the plurality of stacked films including a variable resistance film, a first inter-layer insulating film provided in a first region between the stacked films, and a second inter-layer insulating film provided in a second region having a wider width than the first region. The second inter-layer insulating film includes a plurality of protrusions configured to support one portion of the plurality of second interconnects on the second region. A protruding length of the protrusions is less than a stacking height of the stacked films.

公开(公告)号：US20200258912A1

公开(公告)日：2020-08-13

申请号：US16864876

申请日：2020-05-01

Applicant: Toshiba Memory Corporation

Inventor： Kotaro NODA

IPC: H01L27/11582 ,  H01L27/1157

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

公开(公告)号：US20180277598A1

公开(公告)日：2018-09-27

申请号：US15705219

申请日：2017-09-14

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Minoru ODA ,  Akira YOTSUMOTO ,  Nobuyuki MOMO ,  Kotaro NODA

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/249 ,  H01L27/2454 ,  H01L45/085 ,  H01L45/1683

Abstract: A semiconductor device includes a semiconductor pillar and a control electrode. The semiconductor pillar extends in a first direction, and includes a first region, a second region and an intermediate region provided along the first direction. The intermediate region is positioned between the first region and the second region. The control electrode is disposed at a position so that the control electrode faces the intermediate region via an insulating film. The semiconductor pillar is provided so that a minimum width of the intermediate region in a second direction perpendicular to the first direction is narrower than a first width of the first region in the second direction and a second width of the second region in the second direction.

公开(公告)号：US20180083032A1

公开(公告)日：2018-03-22

申请号：US15822604

申请日：2017-11-27

Applicant: Toshiba Memory Corporation

Inventor： Kotaro NODA

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11575 ,  H01L29/792

CPC classification number: H01L27/11582 ,  H01L27/11565 ,  H01L27/11575 ,  H01L29/7926

Abstract: A semiconductor memory device according to an embodiment comprises: conductive layers stacked in a vertical direction on a semiconductor substrate; and first and columnar bodies that extend in the vertical direction, the first and second columnar bodies each comprising: a first film; a second film disposed on the first film; and a semiconductor film, and the first film of the second columnar body having an upper end positioned higher than a first position lower than a first conductive layer and lower than a second position higher than the first conductive layer and a lower end positioned at or lower than the first position, and the second film of the second columnar body having an upper end positioned higher than the second position and a lower end positioned lower than the first position.