公开(公告)号：US11069710B2

公开(公告)日：2021-07-20

申请号：US16871375

申请日：2020-05-11

申请人： Toshiba Memory Corporation

发明人： Hiroyasu Tanaka ,  Tomoaki Shino

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  H01L27/11526

摘要： A semiconductor memory device includes a memory plane including a plurality of electrode layers stacked on a substrate and a semiconductor layer extending through the plurality of electrode layers in a stacking direction thereof, a circuit provided on the substrate around the memory plane, a first insulating layer covering the circuit, and a second insulating layer including a first portion and a second portion between the substrate and the first insulating layer. The first portion is provided along an outer edge of the memory plane, and the second portion is spaced from the first portion and is provided on the circuit side. The first insulating layer includes a part in contact with the substrate between the first portion and the second portion, and the first insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the second insulating layer.

公开(公告)号：US10658383B2

公开(公告)日：2020-05-19

申请号：US16519705

申请日：2019-07-23

申请人： TOSHIBA MEMORY CORPORATION

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Junya Matsunami ,  Tomoko Fujiwara ,  Hideaki Aochi ,  Ryouhei Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

IPC分类号： H01L21/8249 ,  H01L27/11582 ,  H01L29/66 ,  H01L29/792 ,  H01L27/11578 ,  H01L21/223 ,  H01L21/265 ,  H01L29/78 ,  H01L29/04 ,  H01L29/16 ,  H01L29/423 ,  H01L29/49 ,  H01L29/10

摘要： A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.

公开(公告)号：US10163931B2

公开(公告)日：2018-12-25

申请号：US15960842

申请日：2018-04-24

申请人： TOSHIBA MEMORY CORPORATION

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

IPC分类号： H01L27/10 ,  H01L29/51 ,  H01L27/11582 ,  H01L27/11573 ,  G11C16/04 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/105 ,  H01L27/11556 ,  H01L27/11551

摘要： A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

公开(公告)号：US10741583B2

公开(公告)日：2020-08-11

申请号：US16596892

申请日：2019-10-09

申请人： Toshiba Memory Corporation

发明人： Yoshiaki Fukuzumi ,  Shinya Arai ,  Masaki Tsuji ,  Hideaki Aochi ,  Hiroyasu Tanaka

IPC分类号： H01L27/11582 ,  H01L29/66 ,  H01L29/792 ,  H01L27/11575 ,  H01L27/11565 ,  H01L29/423

摘要： A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.

公开(公告)号：US09985050B2

公开(公告)日：2018-05-29

申请号：US15664924

申请日：2017-07-31

申请人： TOSHIBA MEMORY CORPORATION

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

IPC分类号： H01L27/11 ,  H01L27/11582 ,  H01L29/51 ,  H01L27/11575 ,  H01L27/11573 ,  H01L27/105 ,  G11C16/04 ,  H01L27/11578 ,  H01L27/11556 ,  H01L27/11551

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L27/1052 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578 ,  H01L29/513

摘要： A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

公开(公告)号：US10115733B2

公开(公告)日：2018-10-30

申请号：US15345790

申请日：2016-11-08

申请人： Toshiba Memory Corporation

发明人： Yoshiaki Fukuzumi ,  Shinya Arai ,  Masaki Tsuji ,  Hideaki Aochi ,  Hiroyasu Tanaka

IPC分类号： H01L27/115 ,  H01L27/11582 ,  H01L29/66 ,  H01L29/792 ,  H01L27/11575 ,  H01L27/11565 ,  H01L29/423

摘要： A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.

公开(公告)号：US10685976B2

公开(公告)日：2020-06-16

申请号：US16178336

申请日：2018-11-01

申请人： Toshiba Memory Corporation

发明人： Hiroyasu Tanaka ,  Tomoaki Shino

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  H01L27/11526

摘要： A semiconductor memory device includes a memory plane including a plurality of electrode layers stacked on a substrate and a semiconductor layer extending through the plurality of electrode layers in a stacking direction thereof, a circuit provided on the substrate around the memory plane, a first insulating layer covering the circuit, and a second insulating layer including a first portion and a second portion between the substrate and the first insulating layer. The first portion is provided along an outer edge of the memory plane, and the second portion is spaced from the first portion and is provided on the circuit side. The first insulating layer includes a part in contact with the substrate between the first portion and the second portion, and the first insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the second insulating layer.

公开(公告)号：US10522228B2

公开(公告)日：2019-12-31

申请号：US15910411

申请日：2018-03-02

申请人： TOSHIBA MEMORY CORPORATION

发明人： Hiroyasu Tanaka

IPC分类号： G11C16/04 ,  H01L27/11565 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  G11C19/28

摘要： A storage device includes a circuit on a substrate, electrode layers stacked on the circuit, a channel layer penetrating the electrode layers in a stacking direction, a plate-shaped first wire between the electrode layers and the circuit and electrically connected to the channel layer, a second wire at a level between the circuit and the first wire, a third wire between the circuit and the second wire, a contact plug penetrating the electrode layers and the first wire in the stacking direction and electrically connected to the second wire, and a columnar support body penetrating the electrode layers and the first wire in the stacking direction. The columnar support body has a lower end in contact with the second wire or the third wire. The first wire has a through-via-hole above the second wire, and the contact plug and the columnar support body are disposed inside the through-via-hole.

公开(公告)号：US20190074293A1

公开(公告)日：2019-03-07

申请号：US16178336

申请日：2018-11-01

申请人： Toshiba Memory Corporation

发明人： Hiroyasu Tanaka ,  Tomoaki Shino

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  H01L27/11526

摘要： A semiconductor memory device includes a memory plane including a plurality of electrode layers stacked on a substrate and a semiconductor layer extending through the plurality of electrode layers in a stacking direction thereof, a circuit provided on the substrate around the memory plane, a first insulating layer covering the circuit, and a second insulating layer including a first portion and a second portion between the substrate and the first insulating layer. The first portion is provided along an outer edge of the memory plane, and the second portion is spaced from the first portion and is provided on the circuit side. The first insulating layer includes a part in contact with the substrate between the first portion and the second portion, and the first insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the second insulating layer.

公开(公告)号：US10134755B2

公开(公告)日：2018-11-20

申请号：US15462424

申请日：2017-03-17

申请人： Toshiba Memory Corporation

发明人： Hiroyasu Tanaka ,  Tomoaki Shino

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  H01L27/11526

摘要： A semiconductor memory device includes a memory plane including a plurality of electrode layers stacked on a substrate and a semiconductor layer extending through the plurality of electrode layers in a stacking direction thereof, a circuit provided on the substrate around the memory plane, a first insulating layer including a first portion and a second portion between the substrate and a second insulating layer, and the second insulating layer covering the circuit. The first portion is provided along an outer edge of the memory plane, and the second portion is spaced from the first portion and is provided on the circuit side. The second insulating layer includes a part in contact with the substrate between the first portion and the second portion, and the second insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the first insulating layer.