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公开(公告)号：US11063062B2
公开(公告)日：2021-07-13
申请号：US16564783
申请日：2019-09-09
发明人： Jun Iijima , Masayoshi Tagami , Shinya Arai , Takahiro Tomimatsu
IPC分类号： H01L27/11582 , H01L27/11573 , H01L23/522 , H01L23/00
摘要： In one embodiment, a semiconductor device includes a first chip and a second chip. The first chip includes a first substrate, a control circuit provided on the first substrate, and a first pad provided above the control circuit and electrically connected to the control circuit. The second chip includes a second pad provided on the first pad, a plug provided above the second pad, extending in a first direction, and including a portion that decreases in diameter in a cross-section perpendicular to the first direction with increasing distance from the first substrate, and a bonding pad provided on the plug, intersecting with the first direction, and electrically connected to the second pad by the plug.
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公开(公告)号：US10991719B2
公开(公告)日：2021-04-27
申请号：US16566036
申请日：2019-09-10
发明人： Shinya Arai
IPC分类号： H01L27/11582 , G11C16/04 , H01L21/28 , H01L49/02 , G11C16/26 , H01L27/11568 , H01L27/11553 , H01L27/11551
摘要： A semiconductor memory device according to an embodiment comprises: a semiconductor substrate; a stacked body having a plurality of first insulating layers and conductive layers stacked alternately on the semiconductor substrate; a columnar semiconductor layer contacting the semiconductor substrate in the stacked body being provided extending in a stacking direction of the stacked body and including a first portion and a second portion which is provided above the first portion; a memory layer provided on a side surface of the columnar semiconductor layer facing the stacked conductive layers and extending along the columnar semiconductor layer; and a second insulating layer provided between one of the first insulating layer and the conductive layers of the stacked body. The columnar semiconductor layer has a boundary of the first portion and the second portion, the boundary being close to the second insulating layer; and an average value of an outer diameter of the memory layer facing a side surface of the second insulating layer is larger than that of of the memory layer facing a side surface of a lowermost layer of the first insulating layers in the second portion.
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公开(公告)号：US10985181B2
公开(公告)日：2021-04-20
申请号：US16844026
申请日：2020-04-09
发明人： Shinya Arai
IPC分类号： H01L27/11582 , H01L27/11524 , H01L27/1157 , H01L27/11548 , H01L27/11575 , H01L21/764 , H01L29/06 , G11C16/14 , H01L27/11573 , H01L27/11556 , G11C16/04 , H01L27/11529 , H01L21/311 , H01L21/3213 , H01L21/225 , H01L29/167 , H01L21/02
摘要： According to one embodiment, a source layer includes a semiconductor layer including an impurity. A stacked body includes a plurality of electrode layers stacked with an insulator interposed. A gate layer is provided between the source layer and the stacked body. The gate layer is thicker than a thickness of one layer of the electrode layers. A semiconductor body extends in a stacking direction of the stacked body through the stacked body and the gate layer. The semiconductor body further extends in the semiconductor layer where a side wall portion of the semiconductor body contacts the semiconductor layer. The semiconductor body does not contact the electrode layers and the gate layer.
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公开(公告)号：US10461092B2
公开(公告)日：2019-10-29
申请号：US15824396
申请日：2017-11-28
发明人： Shinya Arai
IPC分类号： H01L27/11582 , G11C16/04 , G11C16/26 , H01L21/28 , H01L27/11568 , H01L49/02 , H01L27/11553 , H01L27/11551
摘要： A semiconductor memory device according to an embodiment comprises: a semiconductor substrate; a stacked body having a plurality of first insulating layers and conductive layers stacked alternately on the semiconductor substrate; a columnar semiconductor layer contacting the semiconductor substrate in the stacked body being provided extending in a stacking direction of the stacked body and including a first portion and a second portion which is provided above the first portion; a memory layer provided on a side surface of the columnar semiconductor layer facing the stacked conductive layers and extending along the columnar semiconductor layer; and a second insulating layer provided between one of the first insulating layer and the conductive layers of the stacked body. The columnar semiconductor layer has a boundary of the first portion and the second portion, the boundary being close to the second insulating layer; and an average value of an outer diameter of the memory layer facing a side surface of the second insulating layer is larger than that of the memory layer facing a side surface of a lowermost layer of the first insulating layers in the second portion.
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公开(公告)号：US09881874B2
公开(公告)日：2018-01-30
申请号：US15057406
申请日：2016-03-01
发明人： Kenichi Yasuda , Shinya Arai
IPC分类号： H01L29/06 , H01L23/544 , H01L21/033 , H01L21/768 , H01L27/11582 , H01L21/28 , H01L21/66 , H01L21/027
CPC分类号： H01L23/544 , G03F1/42 , H01L21/0274 , H01L21/0332 , H01L21/28282 , H01L21/31144 , H01L21/7682 , H01L21/76877 , H01L22/20 , H01L27/11582 , H01L28/00 , H01L2223/5442 , H01L2223/54426 , H01L2223/5446
摘要： According to one embodiment, a forming method of superposition checking marks includes forming a first superposition checking mark to have a first step with respect to an arrangement surface for the first superposition checking mark, forming an opaque film having a second step resulting from the first step on the arrangement surface, and forming on the opaque film a second superposition checking mark provided with a transparent film allowing observation of the second step.
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公开(公告)号：US11049878B2
公开(公告)日：2021-06-29
申请号：US16928113
申请日：2020-07-14
发明人： Jun Fujiki , Shinya Arai , Kotaro Fujii
IPC分类号： H01L27/11582 , H01L27/1157 , H01L27/11573 , H01L21/768 , H01L27/07
摘要： A semiconductor memory device includes a semiconductor substrate including a diode formed in an upper layer portion of the semiconductor substrate, a first insulating film provided above the semiconductor substrate, a first conductive film provided above the first insulating film and coupled to the diode, a stacked body provided above the first conductive film, an insulator and an electrode film being stacked alternately in the stacked body, a semiconductor member piercing the stacked body and being connected to the first conductive film, and a charge storage member provided between the electrode film and the semiconductor member.
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公开(公告)号：US10756104B2
公开(公告)日：2020-08-25
申请号：US16129082
申请日：2018-09-12
发明人： Jun Fujiki , Shinya Arai , Kotaro Fujii
IPC分类号： H01L27/11582 , H01L27/1157 , H01L27/11573 , H01L21/768 , H01L27/07
摘要： A semiconductor memory device includes a semiconductor substrate including a diode formed in an upper layer portion of the semiconductor substrate, a first insulating film provided above the semiconductor substrate, a first conductive film provided above the first insulating film and coupled to the diode, a stacked body provided above the first conductive film, an insulator and an electrode film being stacked alternately in the stacked body, a semiconductor member piercing the stacked body and being connected to the first conductive film, and a charge storage member provided between the electrode film and the semiconductor member.
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公开(公告)号：US10741583B2
公开(公告)日：2020-08-11
申请号：US16596892
申请日：2019-10-09
发明人： Yoshiaki Fukuzumi , Shinya Arai , Masaki Tsuji , Hideaki Aochi , Hiroyasu Tanaka
IPC分类号： H01L27/11582 , H01L29/66 , H01L29/792 , H01L27/11575 , H01L27/11565 , H01L29/423
摘要： A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.
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公开(公告)号：US10665598B2
公开(公告)日：2020-05-26
申请号：US16128655
申请日：2018-09-12
发明人： Satoshi Nagashima , Shinya Arai
IPC分类号： H01L27/11556 , H01L27/11519 , H01L27/11529 , H01L27/11548 , H01L27/11565 , H01L27/11575 , H01L27/11582 , H01L21/768 , H01L27/11573 , H01L21/3213
摘要： A semiconductor memory device includes a substrate, a plurality of first electrode layers, a semiconductor layer, a plurality of second electrode layers, and a conductor. The plurality of first electrode layers are arranged to be separated from each other in a first direction above the substrate. The semiconductor layer extends through the plurality of first electrode layers in the first direction. The plurality of second electrode layers are arranged to be separated from each other in the first direction, arranged to be separated from the plurality of first electrode layers in a second direction crossing the first direction, and arranged at substantially the same levels as levels of the plurality of first electrode layers in the first direction. The conductor electrically connects the plurality of second electrode layers to each other. The plurality of second electrode layers are connected in parallel by the conductor.
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公开(公告)号：US10651199B2
公开(公告)日：2020-05-12
申请号：US16438769
申请日：2019-06-12
发明人： Shinya Arai
IPC分类号： H01L27/11582 , H01L27/11524 , H01L27/1157 , H01L27/11548 , H01L27/11575 , H01L21/764 , H01L29/06 , G11C16/14 , H01L27/11573 , H01L27/11556 , G11C16/04 , H01L27/11529 , H01L21/311 , H01L21/3213 , H01L21/225 , H01L29/167 , H01L21/02
摘要： According to one embodiment, a source layer includes a semiconductor layer including an impurity. A stacked body includes a plurality of electrode layers stacked with an insulator interposed. A gate layer is provided between the source layer and the stacked body. The gate layer is thicker than a thickness of one layer of the electrode layers. A semiconductor body extends in a stacking direction of the stacked body through the stacked body and the gate layer. The semiconductor body further extends in the semiconductor layer where a side wall portion of the semiconductor body contacts the semiconductor layer. The semiconductor body does not contact the electrode layers and the gate layer.
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