公开(公告)号：US09985050B2

公开(公告)日：2018-05-29

申请号：US15664924

申请日：2017-07-31

申请人： TOSHIBA MEMORY CORPORATION

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

IPC分类号： H01L27/11 ,  H01L27/11582 ,  H01L29/51 ,  H01L27/11575 ,  H01L27/11573 ,  H01L27/105 ,  G11C16/04 ,  H01L27/11578 ,  H01L27/11556 ,  H01L27/11551

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L27/1052 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578 ,  H01L29/513

摘要： A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

公开(公告)号：US10797144B2

公开(公告)日：2020-10-06

申请号：US16130432

申请日：2018-09-13

申请人： TOSHIBA MEMORY CORPORATION

发明人： Megumi Ishiduki ,  Hiroshi Nakaki ,  Takamasa Ito

IPC分类号： H01L29/423 ,  H01L29/66 ,  H01L27/11575 ,  H01L27/11582 ,  H01L27/11565 ,  H01L29/792 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/528

摘要： A semiconductor device includes a base body, a stacked body on the base body and a first columnar part. The base body includes a substrate, a first insulating film on the substrate, a first conductive film on the first insulating film, and a first semiconductor part on the first conductive film. The stacked body includes conductive layers and insulating layers stacked alternately in a stacking direction. The first columnar part is provided inside the stacked body and the first semiconductor part. The first columnar part includes a semiconductor body and a memory film between the semiconductor body and conductive layers. The semiconductor body extends in the stacking direction. The first columnar part has a first diameter and a second diameter in a first direction crossing the stacking direction. The first diameter inside the first semiconductor part is larger than the second diameter inside the stacked body.

公开(公告)号：US10658383B2

公开(公告)日：2020-05-19

申请号：US16519705

申请日：2019-07-23

申请人： TOSHIBA MEMORY CORPORATION

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Junya Matsunami ,  Tomoko Fujiwara ,  Hideaki Aochi ,  Ryouhei Kirisawa ,  Yoshimasa Mikajiri ,  Shigeto Oota

IPC分类号： H01L21/8249 ,  H01L27/11582 ,  H01L29/66 ,  H01L29/792 ,  H01L27/11578 ,  H01L21/223 ,  H01L21/265 ,  H01L29/78 ,  H01L29/04 ,  H01L29/16 ,  H01L29/423 ,  H01L29/49 ,  H01L29/10

摘要： A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.

公开(公告)号：US10553600B2

公开(公告)日：2020-02-04

申请号：US15903448

申请日：2018-02-23

申请人： Toshiba Memory Corporation

发明人： Takuya Inatsuka ,  Tadashi Iguchi ,  Murato Kawai ,  Hisashi Kato ,  Megumi Ishiduki

IPC分类号： H01L27/11565 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/1157 ,  H01L27/11582

摘要： According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.

公开(公告)号：US10163931B2

公开(公告)日：2018-12-25

申请号：US15960842

申请日：2018-04-24

申请人： TOSHIBA MEMORY CORPORATION

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

IPC分类号： H01L27/10 ,  H01L29/51 ,  H01L27/11582 ,  H01L27/11573 ,  G11C16/04 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/105 ,  H01L27/11556 ,  H01L27/11551

摘要： A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

公开(公告)号：US09997526B2

公开(公告)日：2018-06-12

申请号：US15258774

申请日：2016-09-07

申请人： TOSHIBA MEMORY CORPORATION

发明人： Gaku Sudo ,  Masanobu Baba ,  Megumi Ishiduki ,  Tadashi Iguchi ,  Murato Kawai

IPC分类号： H01L27/115 ,  H01L27/11568 ,  H01L21/28

CPC分类号： H01L27/11568 ,  H01L21/28282 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11582

摘要： According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a stacked body alternately stacked with a plurality of members and a plurality of intermediate bodies having materials different from materials of the plurality of members, processing an end portion of at least two layers of the plurality of members sequentially in a stacking direction of the stacked body, and forming a step-wise step stacked with the plurality of members and the plurality of intermediate bodies, forming a plurality of side wall films contacting the step and making the end portion of the plurality of members in a step-wise. The making the end portion of the plurality of members in a step-wise includes retreating a portion of the plurality of members, the portion separated from the plurality of side wall films and exposed from the stacked body.

公开(公告)号：US20200373327A1

公开(公告)日：2020-11-26

申请号：US16993398

申请日：2020-08-14

申请人： Toshiba Memory Corporation

发明人： Tadashi IGUCHI ,  Murato Kawai ,  Toru Matsuda ,  Hisashi Kato ,  Megumi Ishiduki

IPC分类号： H01L27/11582 ,  G11C16/04 ,  H01L23/522 ,  H01L27/11575

摘要： A method of producing a semiconductor memory device includes, when three directions crossing each other are set to first, second, and third directions, respectively, laminating a plurality of first laminates and a plurality of second laminates on a semiconductor substrate in the third direction. The method further includes forming ends of the plurality of first laminates in shapes of steps extending in the first direction, and forming ends of the plurality of second laminates in shapes of steps extending in both directions of the first direction and the second direction.

公开(公告)号：US10147735B2

公开(公告)日：2018-12-04

申请号：US14849743

申请日：2015-09-10

申请人： Toshiba Memory Corporation

发明人： Tadashi Iguchi ,  Murato Kawai ,  Toru Matsuda ,  Hisashi Kato ,  Megumi Ishiduki

IPC分类号： H01L29/792 ,  H01L29/788 ,  H01L27/11582 ,  G11C16/04 ,  H01L23/522 ,  H01L27/11575 ,  H01L27/11565

摘要： A semiconductor memory device according to an embodiment includes a memory cell array configured to have a memory string obtained by connecting first selection transistors, memory transistors, and second selection transistors in series. When three directions crossing each other are set to first, second, and third directions, respectively, the memory cell array has first conductive layers to be control gates of the first selection transistors, second conductive layers to be control gates of the memory transistors, and third conductive layers to be control gates of the second selection transistors, which are laminated in the third direction. Ends of the first conductive layers and ends of the third conductive layers are formed in shapes of steps extending in the first direction and ends of the second conductive layers are formed in shapes of steps extending in both directions of the first direction and the second direction.

公开(公告)号：US20180182773A1

公开(公告)日：2018-06-28

申请号：US15903448

申请日：2018-02-23

申请人： Toshiba Memory Corporation

发明人： Takuya Inatsuka ,  Tadashi Iguchi ,  Murato Kawai ,  Hisashi Kato ,  Megumi Ishiduki

IPC分类号： H01L27/11565 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11556 ,  H01L27/11524 ,  H01L27/11519

摘要： According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.

公开(公告)号：US20220020769A1

公开(公告)日：2022-01-20

申请号：US17491958

申请日：2021-10-01

申请人： Toshiba Memory Corporation

发明人： Tadashi Iguchi ,  Murato Kawai ,  Toru Matsuda ,  Hisashi Kato ,  Megumi Ishiduki

IPC分类号： H01L27/11582 ,  G11C16/04 ,  H01L23/522 ,  H01L27/11575

摘要： A method of producing a semiconductor memory device includes, when three directions crossing each other are set to first, second, and third directions, respectively, laminating a plurality of first laminates and a plurality of second laminates on a semiconductor substrate in the third direction. The method further includes forming ends of the plurality of first laminates in shapes of steps extending in the first direction, and forming ends of the plurality of second laminates in shapes of steps extending in both directions of the first direction and the second direction.