公开(公告)号：US20200083285A1

公开(公告)日：2020-03-12

申请号：US16352680

申请日：2019-03-13

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Toshihiko NAGASE ,  Daisuke WATANABE ,  Koji UEDA ,  Tadashi KAI ,  Kazumasa SUNOUCHI

IPC: H01L27/22 ,  H01L43/02 ,  G11C11/16 ,  H01F10/32 ,  H01L43/12 ,  H01F41/34

Abstract: According to one embodiment, a semiconductor storage device includes: a first memory cell and a second memory cell, each including a switching element and a resistance change element coupled to the switching element, and the first memory cell and the second memory cell being adjacent to each other; a non-active member having a switching function between the switching element of the first memory cell and the switching element of the second memory cell; and an insulator which covers at least one of an upper surface or a lower surface of the non-active member, a side surface of the non-active member, a side surface of the switching element of the first memory cell, and a side surface of the switching element of the second memory cell.

公开(公告)号：US20210210549A1

公开(公告)日：2021-07-08

申请号：US17206364

申请日：2021-03-19

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masahiko NAKAYAMA ,  Kazumasa SUNOUCHI ,  Gaku SUDO ,  Tadashi KAI

IPC: H01L27/22 ,  H01L43/02

Abstract: A nonvolatile storage device includes first interconnections extending in a first direction and second interconnections extending in a second direction intersecting the first direction. Memory cells are formed at intersections between first and second interconnections. Each memory cell includes a resistance change element and a selector. In the arrangement of memory cells, all memory cells that are connected to any particular first interconnection are aligned along that first interconnection, and all memory cells connected to any particular second interconnection are alternately staggered in the first direction across a width of that second interconnection.

公开(公告)号：US20200303455A1

公开(公告)日：2020-09-24

申请号：US16559254

申请日：2019-09-03

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masahiko NAKAYAMA ,  Toshihiko NAGASE ,  Tomomi FUNAYAMA ,  Hironobu FURUHASHI ,  Kazumasa SUNOUCHI

IPC: H01L27/22 ,  H01L43/02 ,  H01L45/00 ,  G11C11/16 ,  H01F10/32

Abstract: A nonvolatile storage device includes first and second interconnections and a memory cell between the first and second interconnections. The memory cell includes a storage element, a first switch, and a second switch. The first switch has two terminals and transitions from an off-state to an on-state when a first threshold voltage is applied between its terminals and then voltage between the terminals falls to a first hold voltage. The second switch has two terminals and transitions from an off-state to an on-state when a second threshold voltage is applied between its terminals and then voltage between the terminals falls to a second hold voltage. An off-current of the first switch is less than an off-current of the second switch. The first threshold voltage is greater than the second threshold voltage, which is greater than the first hold voltage, which is greater than or equal to the second hold voltage.

公开(公告)号：US20200303453A1

公开(公告)日：2020-09-24

申请号：US16559162

申请日：2019-09-03

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masahiko NAKAYAMA ,  Kazumasa SUNOUCHI ,  Gaku SUDO ,  Tadashi KAI

IPC: H01L27/22 ,  H01L43/02

Abstract: A nonvolatile storage device includes first interconnections extending in a first direction and second interconnections extending in a second direction intersecting the first direction. Memory cells are formed at intersections between first and second interconnections. Each memory cell includes a resistance change element and a selector. In the arrangement of memory cells, all memory cells that are connected to any particular first interconnection are aligned along that first interconnection, and all memory cells connected to any particular second interconnection are alternately staggered in the first direction across a width of that second interconnection.