公开(公告)号：US20150042641A1

公开(公告)日：2015-02-12

申请号：US13965084

申请日：2013-08-12

申请人： TRAVIS T. SCHLUESSLER ,  BRENT E. INSKO

发明人： TRAVIS T. SCHLUESSLER ,  BRENT E. INSKO

IPC分类号： G06T15/00

CPC分类号： G06T15/005

摘要： Techniques for automatically adjusting three-dimensional (3D) graphics application settings are described. In one embodiment, for example, an apparatus may comprise a processor circuit to execute a 3D graphics application based on one or more feature control settings and a 3D graphics management module to determine a performance metric during execution of the 3D graphics application, compare the performance metric to a performance threshold, and when the performance metric is less than the performance threshold, determine a set of one or more setting adjustments based on feature control information to increase a performance of the 3D graphics application. Other embodiments are described and claimed.

摘要翻译： 描述了自动调整三维（3D）图形应用程序设置的技术。 在一个实施例中，例如，设备可以包括处理器电路，用于基于一个或多个特征控制设置执行3D图形应用，并且3D图形管理模块可以在执行3D图形应用期间确定性能度量，比较性能 度量到性能阈值，并且当性能度量小于性能阈值时，基于特征控制信息确定一组一个或多个设置调整以增加3D图形应用的性能。 描述和要求保护其他实施例。

公开(公告)号：US20140281615A1

公开(公告)日：2014-09-18

申请号：US13797876

申请日：2013-03-12

申请人： SELVAKUMAR PANNEER ,  TION A. THOMAS ,  TRAVIS T. SCHLUESSLER ,  ADAM Z. LEIBEL

发明人： SELVAKUMAR PANNEER ,  TION A. THOMAS ,  TRAVIS T. SCHLUESSLER ,  ADAM Z. LEIBEL

IPC分类号： G06F1/32

CPC分类号： G06F1/3234 ,  G06F1/3215 ,  G06F1/3228 ,  G06F1/3243 ,  G06F1/329 ,  G06F9/4881 ,  G06F9/4893 ,  Y02D10/152 ,  Y02D10/24 ,  Y02D50/20

摘要： Various embodiments are generally directed to an apparatus, method and other techniques for monitoring a task of a graphics processing unit (GPU) by a graphics driver, determining if the task is complete, determining an average task completion time for the task if the task is not complete and enabling a sleep state for a processing circuit for a sleep state time if the average task completion time is greater than the sleep state time.

摘要翻译： 各种实施例通常涉及用于通过图形驱动程序监视图形处理单元（GPU）的任务的装置，方法和其他技术，确定任务是否完整，如果任务是任务，则确定任务的平均任务完成时间 如果平均任务完成时间大于睡眠状态时间，则不能完成并为休眠状态时间的处理电路启用睡眠状态。

公开(公告)号：US20190066356A1

公开(公告)日：2019-02-28

申请号：US15693084

申请日：2017-08-31

申请人： JOHN C. GIERACH ,  DARREL K. PALKE ,  TRAVIS T. SCHLUESSLER ,  PRASOONKUMAR SURTI

发明人： JOHN C. GIERACH ,  DARREL K. PALKE ,  TRAVIS T. SCHLUESSLER ,  PRASOONKUMAR SURTI

IPC分类号： G06T15/00 ,  G06T15/80 ,  G06T15/40 ,  G06T15/20

CPC分类号： G06T15/005 ,  G06T1/20 ,  G06T1/60 ,  G06T15/205 ,  G06T15/40 ,  G06T15/80 ,  G06T2200/28

摘要： An apparatus and method for programmable depth stencil pipeline stage and shading. For example, one embodiment of a graphics processing apparatus comprises: a rasterizer to generate a plurality of pixel blocks, one or more of which overlap one or more primitives; programmable depth stencil circuitry to perform depth stencil tests on the pixels which overlap the one or more primitives to identify pixels which pass the depth stencil tests; and thread dispatch circuitry to dispatch pixel shader threads to perform pixel shading operations on those pixels which pass the depth stencil tests, the thread dispatch circuitry including thread dispatch recombine logic to combine pixels which have passed the depth stencil test from multiple pixel blocks into a set of pixel shader threads to be executed concurrently on single instruction multiple data (SIMD) hardware.

公开(公告)号：US20170178277A1

公开(公告)日：2017-06-22

申请号：US15089270

申请日：2016-04-01

申请人： SAURABH SHARMA ,  ABHISHEK VENKATESH ,  TRAVIS T. SCHLUESSLER ,  THOMAS F. RAOUX ,  RAHUL P. SATHE ,  JON HASSELGREN

发明人： SAURABH SHARMA ,  ABHISHEK VENKATESH ,  TRAVIS T. SCHLUESSLER ,  THOMAS F. RAOUX ,  RAHUL P. SATHE ,  JON HASSELGREN

IPC分类号： G06T1/20 ,  G06T15/00

CPC分类号： G06T1/20 ,  G06F8/41 ,  G06F9/38 ,  G06T15/005

摘要： Techniques to improve graphics processing unit (GPU) performance by introducing specialized code paths to process frequent common values are described. A shader compiler can determine instruction that, during operation, may output a common value and can introduce an enhanced shader instruction branch to process the common value to reduce overall computational requirements to execute the shader.

公开(公告)号：US20150109326A1

公开(公告)日：2015-04-23

申请号：US14061174

申请日：2013-10-23

申请人： JACKY ROMANO ,  TRAVIS T. SCHLUESSLER ,  GUY ZADICARIO ,  STAS GURTOVOY ,  LIRAN BACHAR

发明人： JACKY ROMANO ,  TRAVIS T. SCHLUESSLER ,  GUY ZADICARIO ,  STAS GURTOVOY ,  LIRAN BACHAR

IPC分类号： G06T5/00 ,  G06T7/00 ,  G09G5/18 ,  G06T1/20

CPC分类号： G09G5/18 ,  G06F3/14 ,  G09G5/36 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2340/0435 ,  G09G2360/16

摘要： Various embodiments are generally directed to an apparatus, method and other techniques for receiving image information for a current frame, determining an amount of change between the current frame and a previous based on the image information for the current frame and image information for a previous frame and determining an adjustment of a frame time based on the amount of change between the current frame and the previous frame.

摘要翻译： 各种实施例通常涉及用于接收当前帧的图像信息的装置，方法和其它技术，基于当前帧的图像信息确定当前帧和先前帧之间的变化量，以及用于前一帧的图像信息 以及基于当前帧和先前帧之间的变化量来确定帧时间的调整。

公开(公告)号：US20140089626A1

公开(公告)日：2014-03-27

申请号：US13628314

申请日：2012-09-27

申请人： TRAVIS T. SCHLUESSLER ,  ROBERT B. TAYLOR

发明人： TRAVIS T. SCHLUESSLER ,  ROBERT B. TAYLOR

IPC分类号： G06F12/02

CPC分类号： G06F9/5016 ,  G06F9/45558 ,  G06F12/0284 ,  G06F2212/1041

摘要： Various embodiments are presented herein that reallocate partitions of a shared physical memory between processing units. An apparatus and a computer-implemented method may determine an amount of memory space in the physical memory allocated to a first processing unit during system initialization. The determined amount of the memory space may be consolidated. The consolidated memory space may be allocated to the second processing unit during runtime. Other embodiments are described and claimed.

摘要翻译： 这里呈现了在处理单元之间重新分配共享物理存储器的分区的各种实施例。 装置和计算机实现的方法可以在系统初始化期间确定分配给第一处理单元的物理存储器中的存储器空间量。 可以巩固确定的存储空间量。 统一的存储器空间可以在运行时被分配给第二处理单元。 描述和要求保护其他实施例。