公开(公告)号：US20200310005A1

公开(公告)日：2020-10-01

申请号：US16828815

申请日：2020-03-24

Applicant: TriLumina Corp.

Inventor： Richard F. Carson ,  Preethi Dacha ,  Mial E. Warren

IPC: G02B3/00 ,  H04J14/00 ,  H04B10/50

Abstract: Systems, methods, and devices disclosed herein relate to optical assemblies for spatial multiplexing, multi-zone illumination, and optical assemblies. In embodiments, light source arrays are aligned with one or more micro-lens assemblies to generate a specific field of illumination. In embodiments, surface-emitting light sources may be light-emitting diodes and/or surface-emitting lasers. The micro-lens array may be aligned with the light source arrays, on-axis or off-axis to a principal axis of corresponding lenses such that the light sources may be expanded to a desired divergence and field of illumination. In embodiments, multiple light sources may be combined to increase power output for a specific area of the field of illumination, and light sources may be driven independently depending on intended illumination.

公开(公告)号：US09927558B2

公开(公告)日：2018-03-27

申请号：US15133094

申请日：2016-04-19

Applicant: TRILUMINA CORP.

Inventor： Richard F. Carson ,  John R. Joseph ,  Mial E. Warren ,  Thomas A. Wilcox

IPC: G02B3/00 ,  G02B1/14 ,  H01J37/32 ,  H01S5/42 ,  H01S5/00 ,  G02B7/00 ,  B01J8/00

CPC classification number: G02B3/0012 ,  B01J8/00 ,  B01J2208/00008 ,  G02B1/14 ,  G02B3/0018 ,  G02B3/0025 ,  G02B3/0037 ,  G02B3/0043 ,  G02B3/0056 ,  G02B7/005 ,  H01J37/32009 ,  H01J2237/10 ,  H01J2237/334 ,  H01S5/005 ,  H01S5/423

Abstract: Embodiments comprise a system created through fabricating a lens array through which lasers are emitted. The lens array may be fabricated in the semiconductor substrate used for fabricating the lasers or may be a separate substrate of other transparent material that would be aligned to the lasers. In some embodiments, more lenses may be produced than will eventually be used by the lasers. The inner portion of the substrate may be formed with the lenses that will be used for emitting lasers, and the outer portion of the substrate may be formed with lenses that will not be used for emitting lasers—rather, through etching these additional lenses, the inner lenses may be created with a higher quality.

公开(公告)号：US10530128B2

公开(公告)日：2020-01-07

申请号：US16045633

申请日：2018-07-25

Applicant: TRILUMINA CORP.

Inventor： Richard F. Carson ,  Nein-Yi Li ,  Mial E. Warren

IPC: H01S5/183 ,  H01S5/00 ,  H01S5/022 ,  H01S5/062 ,  H01S5/42 ,  H01S5/024

Abstract: Methods, devices and systems are described for enabling a series-connected, single chip vertical-cavity surface-emitting laser (VCSEL) array. In one aspect, the single chip includes one or more non-conductive regions one the conductive layer to produce a plurality of electrically separate conductive regions. Each electrically separate region may have a plurality of VCSEL elements, including an anode region and a cathode region connected in series. The chip is connected to a sub-mount with a metallization pattern, which connects each electrically separate region on the conductive layer in series. In one aspect, the metallization pattern connects the anode region of a first electrically separate region to the cathode region of a second electrically separate region. The metallization pattern may also comprise cuts that maintain electrical separation between the anode and cathode regions on each conductive layer region, and that align with the etched regions.

公开(公告)号：US10756515B2

公开(公告)日：2020-08-25

申请号：US16733901

申请日：2020-01-03

Applicant: TRILUMINA CORP.

Inventor： Richard F. Carson ,  Nein-Yi Li ,  Mial E. Warren

IPC: H01S5/183 ,  H01S5/00 ,  H01S5/022 ,  H01S5/062 ,  H01S5/42 ,  H01S5/042 ,  H01S5/024 ,  H01S5/40 ,  H01S5/02

Abstract: Methods, devices and systems are described for enabling a series-connected, single chip vertical-cavity surface-emitting laser (VCSEL) array. In one aspect, the single chip includes one or more non-conductive regions one the conductive layer to produce a plurality of electrically separate conductive regions. Each electrically separate region may have a plurality of VCSEL elements, including an anode region and a cathode region connected in series. The chip is connected to a sub-mount with a metallization pattern, which connects each electrically separate region on the conductive layer in series. In one aspect, the metallization pattern connects the anode region of a first electrically separate region to the cathode region of a second electrically separate region. The metallization pattern may also comprise cuts that maintain electrical separation between the anode and cathode regions on each conductive layer region, and that align with the etched regions.