公开(公告)号：US08154133B2

公开(公告)日：2012-04-10

申请号：US12412576

申请日：2009-03-27

申请人： Taisuke Koroku ,  Takeshi Wakabayashi ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

发明人： Taisuke Koroku ,  Takeshi Wakabayashi ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3135 ,  H01L24/11 ,  H01L24/12 ,  H01L24/27 ,  H01L2221/6834 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/11 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/94 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3512 ,  H01L2924/00

摘要： A low dielectric constant film/wiring line stack structure made up of a stack of low dielectric constant films and wiring lines is provided in a region on the upper surface of the semiconductor substrate except for the peripheral part of this surface. The peripheral side surface of the low dielectric constant film/wiring line stack structure is covered with a sealing film. This provides a structure in which the low dielectric constant films do not easily come off. In this case, a lower protective film is provided on the lower surface of a silicon substrate to protect this lower surface against cracks.

摘要翻译： 在半导体基板的上表面的除了该表面的周边部分之外的区域中设置由低介电常数膜和布线组成的低介电常数膜/布线层叠结构。 低介电常数薄膜/布线层叠结构的周边侧表面被密封膜覆盖。 这提供了低介电常数膜不容易脱落的结构。 在这种情况下，在硅基板的下表面上设置下保护膜，以保护该下表面免受裂纹。

公开(公告)号：US20100144096A1

公开(公告)日：2010-06-10

申请号：US12632033

申请日：2009-12-07

申请人： Taisuke Koroku ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

发明人： Taisuke Koroku ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

IPC分类号： H01L21/60

CPC分类号： H01L21/561 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2924/14 ,  H01L2924/19041

摘要： First, a trench is formed in parts of a semiconductor wafer, a sealing film and other elements corresponding to a dicing street and both sides thereof. In this state, the semiconductor wafer is separated into silicon substrates by the formation of the trench. Then, a resin protective film is formed on the bottom surface of each silicon substrate including the inner part of the trench. In this case, the semiconductor wafer is separated into the silicon substrates. However, a support plate is affixed to the upper surfaces of the columnar electrode and the sealing film via an adhesive layer. Therefore, when the resin protective film is formed, it is possible to prevent the entire workpiece including the separated silicon substrates from being easily warped.

公开(公告)号：US07863750B2

公开(公告)日：2011-01-04

申请号：US12507188

申请日：2009-07-22

申请人： Junji Shiota ,  Taisuke Koroku ,  Nobumitsu Fujii ,  Osamu Kuwabara ,  Osamu Okada

发明人： Junji Shiota ,  Taisuke Koroku ,  Nobumitsu Fujii ,  Osamu Kuwabara ,  Osamu Okada

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/053 ,  H01L23/12

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/02331 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014

摘要： In this manufacturing method of a semiconductor device, after a sealing film is applied over an entire surface of a semiconductor wafer and hardened, a second groove for forming a side-section protective film is formed in the sealing film and on the top surface side of the semiconductor wafer. In other words, the sealing film is formed in a state where a groove that causes strength reduction has not been formed on the top surface side of the semiconductor wafer. Since the second groove is formed on the top surface side of the semiconductor wafer after the sealing film is formed, the semiconductor wafer is less likely to warp when the sealing film, made of liquid resin, is hardened.

摘要翻译： 在这种半导体装置的制造方法中，在半导体晶片的整个表面上施加了密封膜并硬化后，在密封膜中形成用于形成侧部保护膜的第二沟槽，并且在顶部表面侧 半导体晶片。 换句话说，密封膜形成为在半导体晶片的顶面侧未形成导致强度降低的槽的状态。 由于在形成密封膜之后在半导体晶片的顶表面侧形成第二凹槽，所以当由液体树脂制成的密封膜硬化时，半导体晶片不太可能翘曲。