公开(公告)号：US08154133B2

公开(公告)日：2012-04-10

申请号：US12412576

申请日：2009-03-27

申请人： Taisuke Koroku ,  Takeshi Wakabayashi ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

发明人： Taisuke Koroku ,  Takeshi Wakabayashi ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3135 ,  H01L24/11 ,  H01L24/12 ,  H01L24/27 ,  H01L2221/6834 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/11 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/94 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3512 ,  H01L2924/00

摘要： A low dielectric constant film/wiring line stack structure made up of a stack of low dielectric constant films and wiring lines is provided in a region on the upper surface of the semiconductor substrate except for the peripheral part of this surface. The peripheral side surface of the low dielectric constant film/wiring line stack structure is covered with a sealing film. This provides a structure in which the low dielectric constant films do not easily come off. In this case, a lower protective film is provided on the lower surface of a silicon substrate to protect this lower surface against cracks.

摘要翻译： 在半导体基板的上表面的除了该表面的周边部分之外的区域中设置由低介电常数膜和布线组成的低介电常数膜/布线层叠结构。 低介电常数薄膜/布线层叠结构的周边侧表面被密封膜覆盖。 这提供了低介电常数膜不容易脱落的结构。 在这种情况下，在硅基板的下表面上设置下保护膜，以保护该下表面免受裂纹。

公开(公告)号：US20090243097A1

公开(公告)日：2009-10-01

申请号：US12412576

申请日：2009-03-27

申请人： Taisuke KOROKU ,  Takeshi Wakabayashi ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

发明人： Taisuke KOROKU ,  Takeshi Wakabayashi ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

IPC分类号： H01L23/488 ,  H01L21/762

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3135 ,  H01L24/11 ,  H01L24/12 ,  H01L24/27 ,  H01L2221/6834 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/11 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/94 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3512 ,  H01L2924/00

摘要： A low dielectric constant film/wiring line stack structure made up of a stack of low dielectric constant films and wiring lines is provided in a region on the upper surface of the semiconductor substrate except for the peripheral part of this surface. The peripheral side surface of the low dielectric constant film/wiring line stack structure is covered with a sealing film. This provides a structure in which the low dielectric constant films do not easily come off. In this case, a lower protective film is provided on the lower surface of a silicon substrate to protect this lower surface against cracks.

摘要翻译： 在半导体基板的上表面的除了该表面的周边部分之外的区域中设置由低介电常数膜和布线组成的低介电常数膜/布线层叠结构。 低介电常数薄膜/布线层叠结构的周边侧表面被密封膜覆盖。 这提供了低介电常数膜不容易脱落的结构。 在这种情况下，在硅基板的下表面上设置下保护膜，以保护该下表面免受裂纹。

公开(公告)号：US20100144095A1

公开(公告)日：2010-06-10

申请号：US12632006

申请日：2009-12-07

申请人： Taisuke KOROKU ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

发明人： Taisuke KOROKU ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

IPC分类号： H01L21/50

CPC分类号： H01L21/6836 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/94 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2224/18 ,  H01L2224/94 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3511 ,  H01L2224/11 ,  H01L2224/03

摘要： First, a trench formed in parts of a semiconductor wafer, a sealing film and others corresponding to a dicing street and both sides thereof. In this state, the semiconductor wafer is separated into silicon substrates by the formation of the trench. Then, a resin protective film is formed on the bottom surface of each silicon substrate including the inner part of the trench. In this case, the semiconductor wafer is separated into the silicon substrates. However, a support plate is affixed to the upper surfaces of the columnar electrode and the sealing film via an adhesive layer. Therefore, when the resin protective film is formed, it is possible to prevent the entirety including the separated silicon substrates from being easily warped.

摘要翻译： 首先，形成在半导体晶片的一部分中的沟槽，密封膜等与切割街道及其两侧对应的沟槽。 在这种状态下，通过形成沟槽将半导体晶片分离成硅衬底。 然后，在包括沟槽的内部的每个硅衬底的底表面上形成树脂保护膜。 在这种情况下，将半导体晶片分离成硅基板。 然而，支撑板通过粘合剂层固定在柱状电极和密封膜的上表面上。 因此，当形成树脂保护膜时，可以防止包含分离的硅衬底的整体容易翘曲。

公开(公告)号：US20100144096A1

公开(公告)日：2010-06-10

申请号：US12632033

申请日：2009-12-07

申请人： Taisuke Koroku ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

发明人： Taisuke Koroku ,  Osamu Okada ,  Osamu Kuwabara ,  Junji Shiota ,  Nobumitsu Fujii

IPC分类号： H01L21/60

CPC分类号： H01L21/561 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2924/14 ,  H01L2924/19041

摘要： First, a trench is formed in parts of a semiconductor wafer, a sealing film and other elements corresponding to a dicing street and both sides thereof. In this state, the semiconductor wafer is separated into silicon substrates by the formation of the trench. Then, a resin protective film is formed on the bottom surface of each silicon substrate including the inner part of the trench. In this case, the semiconductor wafer is separated into the silicon substrates. However, a support plate is affixed to the upper surfaces of the columnar electrode and the sealing film via an adhesive layer. Therefore, when the resin protective film is formed, it is possible to prevent the entire workpiece including the separated silicon substrates from being easily warped.

公开(公告)号：US07863750B2

公开(公告)日：2011-01-04

申请号：US12507188

申请日：2009-07-22

申请人： Junji Shiota ,  Taisuke Koroku ,  Nobumitsu Fujii ,  Osamu Kuwabara ,  Osamu Okada

发明人： Junji Shiota ,  Taisuke Koroku ,  Nobumitsu Fujii ,  Osamu Kuwabara ,  Osamu Okada

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/053 ,  H01L23/12

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/02331 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014

摘要： In this manufacturing method of a semiconductor device, after a sealing film is applied over an entire surface of a semiconductor wafer and hardened, a second groove for forming a side-section protective film is formed in the sealing film and on the top surface side of the semiconductor wafer. In other words, the sealing film is formed in a state where a groove that causes strength reduction has not been formed on the top surface side of the semiconductor wafer. Since the second groove is formed on the top surface side of the semiconductor wafer after the sealing film is formed, the semiconductor wafer is less likely to warp when the sealing film, made of liquid resin, is hardened.

摘要翻译： 在这种半导体装置的制造方法中，在半导体晶片的整个表面上施加了密封膜并硬化后，在密封膜中形成用于形成侧部保护膜的第二沟槽，并且在顶部表面侧 半导体晶片。 换句话说，密封膜形成为在半导体晶片的顶面侧未形成导致强度降低的槽的状态。 由于在形成密封膜之后在半导体晶片的顶表面侧形成第二凹槽，所以当由液体树脂制成的密封膜硬化时，半导体晶片不太可能翘曲。

公开(公告)号：US20100019371A1

公开(公告)日：2010-01-28

申请号：US12507188

申请日：2009-07-22

申请人： Junji SHIOTA ,  Talsuke Koroku ,  Nobumitsu Fujii ,  Osamu Kuwabara ,  Osamu Okada

发明人： Junji SHIOTA ,  Talsuke Koroku ,  Nobumitsu Fujii ,  Osamu Kuwabara ,  Osamu Okada

IPC分类号： H01L23/48 ,  H01L21/78

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/02331 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014

摘要： In this manufacturing method of a semiconductor device, after a sealing film is applied over an entire surface of a semiconductor wafer and hardened, a second groove for forming a side-section protective film is formed in the sealing film and on the top surface side of the semiconductor wafer. In other words, the sealing film is formed in a state where a groove that causes strength reduction has not been formed on the top surface side of the semiconductor wafer. Since the second groove is formed on the top surface side of the semiconductor wafer after the sealing film is formed, the semiconductor wafer is less likely to warp when the sealing film, made of liquid resin, is hardened.

摘要翻译： 在这种半导体装置的制造方法中，在半导体晶片的整个表面上施加了密封膜并硬化后，在密封膜中形成用于形成侧部保护膜的第二沟槽，并且在顶部表面侧 半导体晶片。 换句话说，密封膜形成为在半导体晶片的顶面侧未形成导致强度降低的槽的状态。 由于在形成密封膜之后在半导体晶片的顶表面侧形成第二凹槽，所以当由液体树脂制成的密封膜硬化时，半导体晶片不太可能翘曲。

公开(公告)号：US07592672B2

公开(公告)日：2009-09-22

申请号：US11729650

申请日：2007-03-29

申请人： Takeshi Wakabayashi ,  Ichiro Mihara ,  Osamu Okada

发明人： Takeshi Wakabayashi ,  Ichiro Mihara ,  Osamu Okada

IPC分类号： H01L29/04

CPC分类号： H01L29/78639 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/492 ,  H01L23/50 ,  H01L24/16 ,  H01L24/24 ,  H01L24/73 ,  H01L24/82 ,  H01L24/91 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/16225 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/82007 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/10156 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/05599

摘要： A circuit substrate of a grounding structure of a semiconductor device according to the invention has a plurality of connection pads and a grounding wiring. The semiconductor device has a semiconductor substrate having one side face and the other side face opposite thereto, an insulating film formed thereon, an SOI integrated circuit provided thereon and including a plurality of connection pads, and electrodes for external connection each of which is connected to the corresponding connection pad. The semiconductor device has the external connection electrodes connected to the respective connection pads of the circuit substrate by a face-down bonding scheme. An under-filling material is provided between the semiconductor device and the circuit substrate, and there is provided a connection member which connects the other side face of the semiconductor device with the grounding wiring of the circuit substrate, and is made of a conductive material.

摘要翻译： 根据本发明的半导体器件的接地结构的电路基板具有多个连接焊盘和接地布线。 半导体器件具有一个半导体衬底，其具有一个侧面，另一个侧面与其相对，形成在其上的绝缘膜，设置在其上的SOI集成电路，并且包括多个连接焊盘，以及用于外部连接的电极， 相应的连接板。 半导体器件具有通过面向下接合方案连接到电路衬底的各个连接焊盘的外部连接电极。 在半导体器件和电路基板之间设置有填充不足的材料，并且设置有将半导体器件的另一个侧面与电路基板的接地布线连接的连接部件，并且由导电材料制成。

公开(公告)号：US08587124B2

公开(公告)日：2013-11-19

申请号：US12156822

申请日：2008-06-04

申请人： Aiko Mizusawa ,  Osamu Okada ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Aiko Mizusawa ,  Osamu Okada ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/48

CPC分类号： H01L23/5226 ,  H01L21/78 ,  H01L23/296 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3171 ,  H01L23/525 ,  H01L23/528 ,  H01L23/53295 ,  H01L23/564 ,  H01L24/02 ,  H01L24/11 ,  H01L24/12 ,  H01L24/14 ,  H01L24/94 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/274 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/03

摘要： A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the pump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.

公开(公告)号：US07816790B2

公开(公告)日：2010-10-19

申请号：US11638717

申请日：2006-12-14

申请人： Aiko Mizusawa ,  Osamu Okada ,  Takeshi Wakabayashi

发明人： Aiko Mizusawa ,  Osamu Okada ,  Takeshi Wakabayashi

IPC分类号： H01L23/48

CPC分类号： H01L23/525 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/5329 ,  H01L24/02 ,  H01L24/11 ,  H01L24/12 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/18301 ,  H01L2924/30105

摘要： A semiconductor device includes a semiconductor substrate and low dielectric film wiring line laminated structure portions which are provided in regions on the semiconductor substrate except a peripheral portion thereof. Each of the laminated structure portions has a laminated structure of low dielectric films and a plurality of wiring lines. An insulating film is provided on an upper side of the laminated structure portion. Connection pad portions for electrodes are arranged on the insulating film to be electrically connected to the connection pad portions of uppermost wiring lines of the laminated structure portion. Bump electrodes for external connection are provided on the connection pad portions for the electrodes. A sealing film is provided on the insulating film and on the peripheral portion of the semiconductor substrate. Side surfaces of the laminated structure portions are covered with the insulating film or the sealing film.

摘要翻译： 半导体器件包括半导体衬底和低电介质膜布线层叠结构部分，它们设置在除了其周边部分之外的半导体衬底上的区域中。 各层叠结构部分具有低电介质膜和多条布线的叠层结构。 绝缘膜设置在层叠结构部的上侧。 用于电极的连接焊盘部分布置在绝缘膜上以电连接到层叠结构部分的最上布线的连接焊盘部分。 用于外部连接的凸起电极设置在用于电极的连接焊盘部分上。 在绝缘膜上和半导体衬底的周边部分上设置密封膜。 层叠结构部分的侧表面被绝缘膜或密封膜覆盖。

公开(公告)号：US20090079073A1

公开(公告)日：2009-03-26

申请号：US12156822

申请日：2008-06-04

申请人： Aiko Mizusawa ,  Osamu Okada ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Aiko Mizusawa ,  Osamu Okada ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L21/58 ,  H01L23/488

CPC分类号： H01L23/5226 ,  H01L21/78 ,  H01L23/296 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3171 ,  H01L23/525 ,  H01L23/528 ,  H01L23/53295 ,  H01L23/564 ,  H01L24/02 ,  H01L24/11 ,  H01L24/12 ,  H01L24/14 ,  H01L24/94 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/274 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/03

摘要： A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the pump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.

摘要翻译： 半导体器件包括除了其外围部分之外设置有结构部分的半导体衬底，并且具有包括低电介质膜和布线的层压结构，所述低介电膜的相对介电常数为3.0以下，玻璃化转变 温度在400℃以上。 在结构部分上形成绝缘膜。 连接焊盘部分布置在绝缘膜上并连接到层压结构部分的最上面的布线。 凸起电极设置在连接焊盘部分上。 在围绕泵电极的绝缘膜的一部分上设置由有机树脂制成的密封膜。 层叠结构部分的侧表面被绝缘膜和/或密封膜覆盖。