公开(公告)号：US10283603B2

公开(公告)日：2019-05-07

申请号：US15933812

申请日：2018-03-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/66 ,  H01L21/263 ,  H01L21/265 ,  H01L21/311 ,  H01L29/08 ,  H01L29/40 ,  H01L29/45 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/165

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a first semiconductor fin that extends from a substrate. The first semiconductor fin has source and drain regions, which are separated from one another by a channel region in the first semiconductor fin. A gate overlies an upper surface and sidewalls of the channel region. A contact is coupled to the source or drain region of the first semiconductor fin, where the source or drain region includes a layer of epitaxial material with a substantially diamond-shaped cross-section. The contact surrounds the source or drain region on top and bottom surfaces of the substantially diamond-shaped cross-section. A first capping material is arranged along outer sidewalls of the first semiconductor fin under the contact. The first capping material has an uppermost surface that is spaced below a lowermost surface of the contact by a non-zero distance.

公开(公告)号：US20200020776A1

公开(公告)日：2020-01-16

申请号：US16504117

申请日：2019-07-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang ,  Li-Te Lin

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L21/3065

Abstract: A method of forming an air-gap spacer in a semiconductor device includes providing a device including a gate stack, a plurality of spacer layers disposed on a sidewall of the gate stack, and a source/drain feature adjacent to the gate stack. In some embodiments, a first spacer layer of the plurality of spacer layers is removed to form an air gap on the sidewall of the gate stack. In various examples, a first sealing layer is then deposited over a top portion of the air gap to form a sealed air gap, and a second sealing layer is deposited over the first sealing layer. Thereafter, a first self-aligned contact (SAC) layer is etched from over the source/drain feature using a first etching process. In various embodiments, the first etching process selectively etches the first SAC layer while the first and second sealing layers remain unetched.

公开(公告)号：US20150255604A1

公开(公告)日：2015-09-10

申请号：US14196320

申请日：2014-03-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chan Syun David Yang

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/088

CPC classification number: H01L29/41791 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/26533 ,  H01L21/31116 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/401 ,  H01L29/45 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: Some embodiments of the present disclosure relate to a contact formed to a source or drain region of a “finned” field-effect transistor (FinFET). An epitaxial material is formed over the source or drain region, which includes a diamond-shaped cross-section with top and bottom surfaces. A capping layer is formed over the top and bottom surfaces. The source or drain region is subjected to a first etch to remove the capping layer surrounding the top surfaces of the diamond-shaped cross-section. A protective layer is formed within the top surfaces. A second etch of the capping layer is performed to remove the capping layer surrounding the bottom surfaces of the diamond-shaped cross-section, while using the protective layer to prevent etching of the top surfaces by the second etch. A contact is formed to the source or drain region, which surrounds the source or drain region on the top and bottom surfaces.

Abstract translation: 本公开的一些实施例涉及形成于“鳍状”场效应晶体管（FinFET）的源极或漏极区域的接触。 在源极或漏极区域上形成外延材料，其包括具有顶部和底部表面的菱形横截面。 在顶表面和底表面上形成覆盖层。 对源极或漏极区域进行第一蚀刻以去除围绕菱形横截面的顶表面的封盖层。 在顶表面内形成保护层。 执行覆盖层的第二次蚀刻以去除围绕钻石形横截面的底表面的覆盖层，同时使用保护层以防止通过第二蚀刻蚀刻顶表面。 接触件形成在源极或漏极区域，其围绕顶部和底部表面上的源极或漏极区域。

公开(公告)号：US10790370B2

公开(公告)日：2020-09-29

申请号：US16402527

申请日：2019-05-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/66 ,  H01L21/263 ,  H01L21/265 ,  H01L21/311 ,  H01L29/08 ,  H01L29/40 ,  H01L29/45 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/165

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a first semiconductor fin that extends from a substrate. The first semiconductor fin has source and drain regions, which are separated from one another by a channel region in the first semiconductor fin. A gate overlies an upper surface and sidewalls of the channel region. A contact is coupled to the source or drain region of the first semiconductor fin, where the source or drain region includes a layer of epitaxial material with a substantially diamond-shaped cross-section. The contact surrounds the source or drain region on top and bottom surfaces of the substantially diamond-shaped cross-section. A first capping material is arranged along outer sidewalls of the first semiconductor fin under the contact. The first capping material has an uppermost surface that is spaced below a lowermost surface of the contact by a non-zero distance.

公开(公告)号：US20190259846A1

公开(公告)日：2019-08-22

申请号：US16402527

申请日：2019-05-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/45 ,  H01L29/08 ,  H01L29/40 ,  H01L21/263 ,  H01L29/78 ,  H01L21/265 ,  H01L21/311

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a first semiconductor fin that extends from a substrate. The first semiconductor fin has source and drain regions, which are separated from one another by a channel region in the first semiconductor fin. A gate overlies an upper surface and sidewalls of the channel region. A contact is coupled to the source or drain region of the first semiconductor fin, where the source or drain region includes a layer of epitaxial material with a substantially diamond-shaped cross-section. The contact surrounds the source or drain region on top and bottom surfaces of the substantially diamond-shaped cross-section. A first capping material is arranged along outer sidewalls of the first semiconductor fin under the contact. The first capping material has an uppermost surface that is spaced below a lowermost surface of the contact by a non-zero distance.

公开(公告)号：US11942367B2

公开(公告)日：2024-03-26

申请号：US17113836

申请日：2020-12-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang ,  Li-Te Lin ,  Chun-Jui Huang

IPC: H01L21/768 ,  H01L23/535 ,  H01L29/165 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/76897 ,  H01L23/535 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7848

Abstract: A semiconductor device such as a fin field effect transistor and its method of manufacture are provided. In some embodiments gate spacers are formed over a semiconductor fin, and a first gate stack is formed over the fin. A first sacrificial material with a large selectivity to the gate spacers is formed over the gate stack, and a second sacrificial material with a large selectivity is formed over a source/drain contact plug. Etching processes are utilized to form openings through the first sacrificial material and through the second sacrificial material, and the openings are filled with a conductive material.

公开(公告)号：US20230386921A1

公开(公告)日：2023-11-30

申请号：US18446728

申请日：2023-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang ,  Li-Te Lin ,  Chun-Jui Huang

IPC: H01L21/768 ,  H01L29/66 ,  H01L23/535 ,  H01L29/78 ,  H01L29/417

CPC classification number: H01L21/76897 ,  H01L29/66795 ,  H01L23/535 ,  H01L29/7851 ,  H01L29/41791 ,  H01L29/785 ,  H01L29/7848 ,  H01L29/66545 ,  H01L29/165

Abstract: A semiconductor device such as a fin field effect transistor and its method of manufacture are provided. In some embodiments gate spacers are formed over a semiconductor fin, and a first gate stack is formed over the fin. A first sacrificial material with a large selectivity to the gate spacers is formed over the gate stack, and a second sacrificial material with a large selectivity is formed over a source/drain contact plug. Etching processes are utilized to form openings through the first sacrificial material and through the second sacrificial material, and the openings are filled with a conductive material.

公开(公告)号：US20160351671A1

公开(公告)日：2016-12-01

申请号：US15231967

申请日：2016-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang

IPC: H01L29/417 ,  H01L29/40 ,  H01L29/08 ,  H01L21/263 ,  H01L21/265 ,  H01L29/45 ,  H01L29/78 ,  H01L21/311

CPC classification number: H01L29/41791 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/26533 ,  H01L21/31116 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/401 ,  H01L29/45 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: Some embodiments of the present disclosure relate to a contact formed to a source or drain region of a “finned” field-effect transistor (FinFET). An epitaxial material is formed over the source or drain region, which includes a diamond-shaped cross-section with top and bottom surfaces. A capping layer is formed over the top and bottom surfaces. The source or drain region is subjected to a first etch to remove the capping layer surrounding the top surfaces of the diamond-shaped cross-section. A protective layer is formed within the top surfaces. A second etch of the capping layer is performed to remove the capping layer surrounding the bottom surfaces of the diamond-shaped cross-section, while using the protective layer to prevent etching of the top surfaces by the second etch. A contact is formed to the source or drain region, which surrounds the source or drain region on the top and bottom surfaces.

Abstract translation: 本公开的一些实施例涉及形成于“鳍状”场效应晶体管（FinFET）的源极或漏极区域的接触。 在源极或漏极区域上形成外延材料，其包括具有顶部和底部表面的菱形横截面。 在顶表面和底表面上形成覆盖层。 对源极或漏极区域进行第一蚀刻以去除围绕菱形横截面的顶表面的封盖层。 在顶表面内形成保护层。 执行覆盖层的第二次蚀刻以去除围绕钻石形横截面的底表面的覆盖层，同时使用保护层以防止通过第二蚀刻蚀刻顶表面。 接触件形成在源极或漏极区域，其围绕顶部和底部表面上的源极或漏极区域。

公开(公告)号：US11205700B2

公开(公告)日：2021-12-21

申请号：US16504117

申请日：2019-07-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang ,  Li-Te Lin

IPC: H01L29/10 ,  H01L29/66 ,  H01L21/3065 ,  H01L29/78

Abstract: A method of forming an air-gap spacer in a semiconductor device includes providing a device including a gate stack, a plurality of spacer layers disposed on a sidewall of the gate stack, and a source/drain feature adjacent to the gate stack. In some embodiments, a first spacer layer of the plurality of spacer layers is removed to form an air gap on the sidewall of the gate stack. In various examples, a first sealing layer is then deposited over a top portion of the air gap to form a sealed air gap, and a second sealing layer is deposited over the first sealing layer. Thereafter, a first self-aligned contact (SAC) layer is etched from over the source/drain feature using a first etching process. In various embodiments, the first etching process selectively etches the first SAC layer while the first and second sealing layers remain unetched.

公开(公告)号：US20210111071A1

公开(公告)日：2021-04-15

申请号：US17113836

申请日：2020-12-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan Syun David Yang ,  Li-Te Lin ,  Chun-Jui Huang

IPC: H01L21/768 ,  H01L29/66 ,  H01L23/535 ,  H01L29/78 ,  H01L29/417

Abstract: A semiconductor device such as a fin field effect transistor and its method of manufacture are provided. In some embodiments gate spacers are formed over a semiconductor fin, and a first gate stack is formed over the fin. A first sacrificial material with a large selectivity to the gate spacers is formed over the gate stack, and a second sacrificial material with a large selectivity is formed over a source/drain contact plug. Etching processes are utilized to form openings through the first sacrificial material and through the second sacrificial material, and the openings are filled with a conductive material.