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公开(公告)号:US20200081636A1
公开(公告)日:2020-03-12
申请号:US16685722
申请日:2019-11-15
Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
Inventor: Yu-Hao HSU , Cheng Hung LEE , Chen-Lin YANG , Chiting CHENG , Fu-An WU , Hung-Jen LIAO , Jung-Ping YANG , Jonathan Tsung-Yung CHANG , Wei Min CHAN , Yen-Huei CHEN , Yangsyu LIN , Chien-Chen LIN
Abstract: Various embodiments for configurable memory storage systems are disclosed. The configurable memory storages selectively choose an operational voltage signal from among multiple operational voltage signals to dynamically control various operational parameters. For example, the configurable memory storages selectively choose a maximum operational voltage signal from among the multiple operational voltage signals to maximize read/write speed. As another example, the configurable memory storages selectively choose a minimum operational voltage signal from among the multiple operational voltage signals to minimize power consumption.
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公开(公告)号:US20220236894A1
公开(公告)日:2022-07-28
申请号:US17717491
申请日:2022-04-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Hao HSU , Cheng Hung LEE , Chen-Lin YANG , Chiting CHENG , Fu-An WU , Hung-Jen LIAO , Jung-Ping YANG , Jonathan Tsung-Yung CHANG , Wei Min CHAN , Yen-Huei CHEN , Yangsyu LIN , Chien-Chen LIN
Abstract: Various embodiments for configurable memory storage systems are disclosed. The configurable memory storages selectively choose an operational voltage signal from among multiple voltage signals to dynamically control various operational parameters. For example, the configurable memory storages selectively choose a maximum voltage signal from among the multiple voltage signals to maximize read/write speed. As another example, the configurable memory storages selectively choose a minimum voltage signal from among the multiple voltage signals to minimize power consumption.
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公开(公告)号:US20140269141A1
公开(公告)日:2014-09-18
申请号:US13904653
申请日:2013-05-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Hao HSU , Ming-Chien TSAI , Chen-Lin YANG
IPC: G11C8/08
Abstract: A memory includes a clock generator for providing a first clock signal responsive to a second clock signal and a feedback signal. A feedback loop provides the feedback signal and includes a tracking wordline, a tracking bitline, a tracking bit cell, and a tracking wordline driver for driving the tracking wordline responsive to the first clock signal. The memory includes a tracking wordline level tuner for reducing a voltage level of a tracking wordline signal on the tracking wordline responsive to a weak bit control signal.
Abstract translation: 存储器包括响应于第二时钟信号和反馈信号提供第一时钟信号的时钟发生器。 反馈回路提供反馈信号,并且包括跟踪字线,跟踪位线,跟踪位单元和用于响应于第一时钟信号驱动跟踪字线的跟踪字线驱动器。 存储器包括跟踪字线电平调谐器,用于响应弱位控制信号减小跟踪字线上的跟踪字线信号的电压电平。
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公开(公告)号:US20210200452A1
公开(公告)日:2021-07-01
申请号:US17201931
申请日:2021-03-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Hao HSU , Cheng Hung LEE , Chen-Lin YANG , Chiting CHENG , Fu-An WU , Hung-Jen LIAO , Jung-Ping YANG , Jonathan Tsung-Yung CHANG , Wei Min CHAN , Yen-Huei CHEN , Yangsyu LIN , Chien-Chen LIN
Abstract: Various embodiments for configurable memory storage systems are disclosed. The configurable memory storages selectively choose an operational voltage signal from among multiple operational voltage signals to dynamically control various operational parameters. For example, the configurable memory storages selectively choose a maximum operational voltage signal from among the multiple operational voltage signals to maximize read/write speed. As another example, the configurable memory storages selectively choose a minimum operational voltage signal from among the multiple operational voltage signals to minimize power consumption.
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