公开(公告)号：US11764288B2

公开(公告)日：2023-09-19

申请号：US17855465

申请日：2022-06-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. ,  TSMC CHINA COMPANY LIMITED

Inventor： Feng Han ,  Lei Shi ,  Hung-Chih Tsai ,  Liang-Yu Su ,  Hang Fan

IPC: H01L29/76 ,  H01L29/94 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/66681 ,  H01L21/823412 ,  H01L29/0649 ,  H01L29/7816

Abstract: A method includes forming a body region of a first conductivity type and a doped region of a second conductivity type in a semiconductor substrate; forming a gate structure the substrate, and first gate spacers respectively on first and second sides of the gate structure; depositing a second spacer layer and a third spacer layer over the gate structure; patterning the third spacer layer into third gate spacers respectively on the first and second sides of the gate structure; removing a first one of the third gate spacers from the first side of the gate structure, while leaving a second one of the third gate spacers on the second side of the gate structure; and patterning the second spacer layer into a second gate spacer by using the second one of the third gate spacers as an etching mask.

公开(公告)号：US11195945B2

公开(公告)日：2021-12-07

申请号：US16558518

申请日：2019-09-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Cheng Lin ,  Chen-Bau Wu ,  Chun Lin Tsai ,  Haw-Yun Wu ,  Liang-Yu Su ,  Yun-Hsiang Wang

IPC: H01L29/778 ,  H01L21/285 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/47 ,  H01L29/417

Abstract: In some embodiments, the present disclosure relates to a high voltage device that includes a substrate comprising a first semiconductor material. A channel layer that comprises a second semiconductor material is arranged over the substrate. An active layer that comprises a third semiconductor material is arranged over the channel layer. Over the active layer is a source contact spaced apart from a drain contact. A gate structure is arranged laterally between the source and drain contacts and over the active layer to define a high electron mobility transistor (HEMT) device. Between the gate structure and the source contact is a cap structure, which is coupled to the source contact and laterally spaced from the gate structure. The cap structure and a gate electrode of the gate structure comprise a same material.

公开(公告)号：US20210273119A1

公开(公告)日：2021-09-02

申请号：US17324402

申请日：2021-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Liang-Yu Su ,  Chih-Wen Yao ,  Hsiao-Chin Tuan ,  Ming-Ta Lei

IPC: H01L29/93 ,  H01L27/08 ,  H01L29/66 ,  H01L29/06

Abstract: Various embodiments of the present disclosure are directed towards a method for forming a varactor comprising a reduced surface field (RESURF) region. The method includes forming a drift region having a first doping type within a substrate. A RESURF region having a second doping type is formed within the substrate such that the RESURF region is below the drift region. A gate structure is formed on the substrate. A pair of contact regions is formed within the substrate on opposing sides of the gate structure. The contact regions respectively abut the drift region and have the first doping type, and wherein the first doping type is opposite the second doping type.

公开(公告)号：US20210066483A1

公开(公告)日：2021-03-04

申请号：US16558518

申请日：2019-09-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Cheng Lin ,  Chen-Bau Wu ,  Chun Lin Tsai ,  Haw-Yun Wu ,  Liang-Yu Su ,  Yun-Hsiang Wang

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/417 ,  H01L29/47 ,  H01L21/285 ,  H01L29/66

Abstract: In some embodiments, the present disclosure relates to a high voltage device that includes a substrate comprising a first semiconductor material. A channel layer that comprises a second semiconductor material is arranged over the substrate. An active layer that comprises a third semiconductor material is arranged over the channel layer. Over the active layer is a source contact spaced apart from a drain contact. A gate structure is arranged laterally between the source and drain contacts and over the active layer to define a high electron mobility transistor (HEMT) device. Between the gate structure and the source contact is a cap structure, which is coupled to the source contact and laterally spaced from the gate structure. The cap structure and a gate electrode of the gate structure comprise a same material.

公开(公告)号：US11978810B2

公开(公告)日：2024-05-07

申请号：US17324402

申请日：2021-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Liang-Yu Su ,  Chih-Wen Yao ,  Hsiao-Chin Tuan ,  Ming-Ta Lei

IPC: H01L29/66 ,  H01L27/08 ,  H01L29/06 ,  H01L29/93

CPC classification number: H01L29/93 ,  H01L27/0808 ,  H01L29/063 ,  H01L29/66174

Abstract: Various embodiments of the present disclosure are directed towards a method for forming a varactor comprising a reduced surface field (RESURF) region. The method includes forming a drift region having a first doping type within a substrate. A RESURF region having a second doping type is formed within the substrate such that the RESURF region is below the drift region. A gate structure is formed on the substrate. A pair of contact regions is formed within the substrate on opposing sides of the gate structure. The contact regions respectively abut the drift region and have the first doping type, and wherein the first doping type is opposite the second doping type.

公开(公告)号：US11380779B2

公开(公告)日：2022-07-05

申请号：US17060049

申请日：2020-09-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. ,  TSMC CHINA COMPANY LIMITED

Inventor： Feng Han ,  Lei Shi ,  Hung-Chih Tsai ,  Liang-Yu Su ,  Hang Fan

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L29/66 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/78

Abstract: A semiconductor device includes a gate structure, a double diffused region, a source region, a drain region, a first gate spacer, and a second gate spacer. The gate structure is over a semiconductor substrate. The double diffused region is in the semiconductor substrate and laterally extends past a first side of gate structure. The source region is in the semiconductor substrate and is adjacent a second side of the gate structure opposite the first side. The drain region is in the double diffused region in the semiconductor substrate and is of a same conductivity type as the double diffused region. The first gate spacer is on the first side of the gate structure. The second gate spacer extends upwardly from the double diffused region along an outermost sidewall of the first gate spacer and terminates prior to reaching a top surface of the gate structure.

公开(公告)号：US11018266B2

公开(公告)日：2021-05-25

申请号：US16434381

申请日：2019-06-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Liang-Yu Su ,  Chih-Wen Yao ,  Hsiao-Chin Tuan ,  Ming-Ta Lei

IPC: H01L29/93 ,  H01L27/08 ,  H01L29/66 ,  H01L29/06

Abstract: Various embodiments of the present disclosure are directed towards a varactor comprising a reduced surface field (RESURF) region. In some embodiments, the varactor includes a drift region, a gate structure, a pair of contact regions, and a RESURF region. The drift region is within a substrate and has a first doping type. The gate structure overlies the drift region. The contact regions are within the substrate and overlie the drift region. Further, the contact regions have the first doping type. The gate structure is laterally sandwiched between the contact regions. The RESURF region is in the substrate, below the drift region, and has a second doping type. The second doping type is opposite the first doping type. The RESURF region aids in depleting the drift region under the gate structure, which decreases the minimum capacitance of the varactor and increases the tuning range of the varactor.