公开(公告)号：US11961834B2

公开(公告)日：2024-04-16

申请号：US17699471

申请日：2022-03-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Po-Lin Peng ,  Li-Wei Chu ,  Ming-Fu Tsai ,  Jam-Wem Lee ,  Yu-Ti Su

IPC: H01L27/02 ,  H01L27/06 ,  H01L29/86 ,  H01L29/87 ,  H01L23/60 ,  H01L23/62 ,  H01L29/08 ,  H01L29/10 ,  H01L29/747 ,  H01L29/861

CPC classification number: H01L27/0262 ,  H01L27/0207 ,  H01L27/0255 ,  H01L29/87 ,  H01L23/60 ,  H01L23/62 ,  H01L27/0248 ,  H01L27/0652 ,  H01L27/0658 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/747 ,  H01L29/8611 ,  H01L2924/13034 ,  H01L2924/13035

Abstract: A semiconductor device includes a first diode, a second diode, a clamp circuit and a third diode. The first diode is coupled between an input/output (I/O) pad and a first voltage terminal. The second diode is coupled with the first diode, the I/O pad and a second voltage terminal. The clamp circuit is coupled between the first voltage terminal and the second voltage terminal. The second diode and the clamp circuit are configured to direct a first part of an electrostatic discharge (ESD) current flowing between the I/O pad and the first voltage terminal. The third diode, coupled to the first voltage terminal, and the second diode include a first semiconductor structure configured to direct a second part of the ESD current flowing between the I/O pad and the first voltage terminal.

公开(公告)号：US11929363B2

公开(公告)日：2024-03-12

申请号：US17699493

申请日：2022-03-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Po-Lin Peng ,  Li-Wei Chu ,  Ming-Fu Tsai ,  Jam-Wem Lee ,  Yu-Ti Su

IPC: H01L27/06 ,  H01L27/02 ,  H01L29/08 ,  H01L29/10 ,  H01L29/74 ,  H01L29/86 ,  H01L29/87 ,  H01L23/60 ,  H01L23/62 ,  H01L29/747 ,  H01L29/861

CPC classification number: H01L27/0262 ,  H01L27/0207 ,  H01L27/0255 ,  H01L29/87 ,  H01L23/60 ,  H01L23/62 ,  H01L27/0248 ,  H01L27/0652 ,  H01L27/0658 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/747 ,  H01L29/8611 ,  H01L2924/13034 ,  H01L2924/13035

Abstract: In some embodiments, a semiconductor device is provided, including a first doped region of a first conductivity type configured as a first terminal of a first diode, a second doped region of a second conductivity type configured as a second terminal of the first diode, wherein the first and second doped regions are coupled to a first voltage terminal; a first well of the first conductivity type surrounding the first and second doped regions in a layout view; a third doped region of the first conductivity type configured as a first terminal, coupled to an input/output pad, of a second diode; and a second well of the second conductivity type surrounding the third doped region in the layout view. The second and third doped regions, the first well, and the second well are configured as a first electrostatic discharge path between the I/O pad and the first voltage terminal.

公开(公告)号：US11355927B2

公开(公告)日：2022-06-07

申请号：US16936236

申请日：2020-07-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Po-Lin Peng ,  Yu-Ti Su ,  Chia-Wei Hsu ,  Ming-Fu Tsai ,  Shu-Yu Su ,  Li-Wei Chu ,  Jam-Wem Lee ,  Chia-Jung Chang ,  Hsiang-Hui Cheng

IPC: H02H9/04 ,  G01R31/00 ,  H02H1/00

Abstract: A device is disclosed herein. The device includes an electrostatic discharge (ESD) detector, a bias generator, and an ESD driver including at least two transistors coupled to each other in series. The ESD detector is configured to detect an input signal and generate a detection signal in response to an ESD event being detected. The bias generator is configured to generate a bias signal according to the detection signal. The at least two transistors are controlled according to the bias signal and a logic control signal, and the input signal is applied across the at least two transistors.

公开(公告)号：US20190109129A1

公开(公告)日：2019-04-11

申请号：US16202403

申请日：2018-11-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jen-Chou Tseng ,  Ming-Fu Tsai ,  Tzu-Heng Chang

IPC: H01L27/02 ,  H01L23/498 ,  G01R31/00 ,  H01L21/66 ,  G01R31/26 ,  H01L23/525

Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.

公开(公告)号：US20170141100A1

公开(公告)日：2017-05-18

申请号：US15271272

申请日：2016-09-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jen-Chou Tseng ,  Ming-Fu Tsai ,  Tzu-Heng Chang

IPC: H01L27/02 ,  G01R31/26 ,  H01L23/498 ,  G01R31/00 ,  H01L21/66 ,  H01L23/525

CPC classification number: H01L27/0292 ,  G01R31/002 ,  G01R31/2607 ,  H01L22/14 ,  H01L22/32 ,  H01L22/34 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5256 ,  H01L27/0251 ,  H01L27/0255 ,  H01L2224/11

Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.

公开(公告)号：US12051896B2

公开(公告)日：2024-07-30

申请号：US18323368

申请日：2023-05-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Po-Lin Peng ,  Yu-Ti Su ,  Chia-Wei Hsu ,  Ming-Fu Tsai ,  Shu-Yu Su ,  Li-Wei Chu ,  Jam-Wem Lee ,  Chia-Jung Chang ,  Hsiang-Hui Cheng

IPC: H02H9/04 ,  G01R31/00 ,  H02H1/00

CPC classification number: H02H9/046 ,  G01R31/001 ,  H02H1/0007

Abstract: A device is disclosed herein. The device includes a bias generator, an ESD driver, and a logic circuit. The bias generator includes a first transistor. The ESD driver includes a second transistor and a third transistor coupled to each other in series. The logic circuit is configured to generate a logic control signal. When the first transistor is turned on by a detection signal, the first transistor is turned off.

公开(公告)号：US20230352338A1

公开(公告)日：2023-11-02

申请号：US18346589

申请日：2023-07-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Alexander Kalnitsky ,  Jen-Chou Tseng ,  Chia-Wei Hsu ,  Ming-Fu Tsai

IPC: H01L21/762 ,  H01L27/02

CPC classification number: H01L21/76224 ,  H01L27/0259 ,  H01L29/0649

Abstract: Methods and devices are provided herein for enhancing robustness of a bipolar electrostatic discharge (ESD) device. The robustness of a bipolar ESD device includes providing an emitter region and a collector region adjacent to the emitter region. An isolation structure is provided between the emitter region and the collector region. A ballasting characteristic at the isolation structure is modified by inserting at least one partition structure therein. Each partition structure extends substantially abreast at least one of the emitter and the collector regions.

公开(公告)号：US10170461B2

公开(公告)日：2019-01-01

申请号：US15271272

申请日：2016-09-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jen-Chou Tseng ,  Ming-Fu Tsai ,  Tzu-Heng Chang

IPC: G01R31/00 ,  H01L27/02 ,  G01R31/26 ,  H01L21/66 ,  H01L23/498 ,  H01L23/525

Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.

公开(公告)号：US12002706B2

公开(公告)日：2024-06-04

申请号：US18346589

申请日：2023-07-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Alexander Kalnitsky ,  Jen-Chou Tseng ,  Chia-Wei Hsu ,  Ming-Fu Tsai

IPC: H01L21/762 ,  H01L27/02 ,  H01L29/06 ,  H01L29/66 ,  H01L29/73

CPC classification number: H01L21/76224 ,  H01L27/0259 ,  H01L29/0649 ,  H01L29/66234 ,  H01L29/73

Abstract: Methods and devices are provided herein for enhancing robustness of a bipolar electrostatic discharge (ESD) device. The robustness of a bipolar ESD device includes providing an emitter region and a collector region adjacent to the emitter region. An isolation structure is provided between the emitter region and the collector region. A ballasting characteristic at the isolation structure is modified by inserting at least one partition structure therein. Each partition structure extends substantially abreast at least one of the emitter and the collector regions.

公开(公告)号：US20210082743A1

公开(公告)日：2021-03-18

申请号：US17106553

申请日：2020-11-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Alexander Kalnitsky ,  Jen-Chou Tseng ,  Chia-Wei Hsu ,  Ming-Fu Tsai

IPC: H01L21/762 ,  H01L27/02

Abstract: Methods and devices are provided herein for enhancing robustness of a bipolar electrostatic discharge (ESD) device. The robustness of a bipolar ESD device includes providing an emitter region and a collector region adjacent to the emitter region. An isolation structure is provided between the emitter region and the collector region. A ballasting characteristic at the isolation structure is modified by inserting at least one partition structure therein. Each partition structure extends substantially abreast at least one of the emitter and the collector regions.