公开(公告)号：US11121255B2

公开(公告)日：2021-09-14

申请号：US16872235

申请日：2020-05-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chii-Horng Li ,  Chih-Shan Chen ,  Roger Tai ,  Yih-Ann Lin ,  Yen-Ru Lee ,  Tzu-Ching Lin

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor base. A dielectric isolation structure is formed in the semiconductor base. A source/drain of a FinFET transistor is formed on the semiconductor base. A bottom segment of the source/drain is embedded into the semiconductor base. The bottom segment of the source/drain has a V-shaped cross-sectional profile. The bottom segment of the source/drain is separated from the dielectric isolation structure by portions of the semiconductor base.

公开(公告)号：US10763366B2

公开(公告)日：2020-09-01

申请号：US16654906

申请日：2019-10-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chii-Horng Li ,  Chih-Shan Chen ,  Roger Tai ,  Yih-Ann Lin ,  Yen-Ru Lee ,  Tzu-Ching Lin

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor base. A dielectric isolation structure is formed in the semiconductor base. A source/drain of a FinFET transistor is formed on the semiconductor base. A bottom segment of the source/drain is embedded into the semiconductor base. The bottom segment of the source/drain has a V-shaped cross-sectional profile. The bottom segment of the source/drain is separated from the dielectric isolation structure by portions of the semiconductor base.

公开(公告)号：US11735668B2

公开(公告)日：2023-08-22

申请号：US17875644

申请日：2022-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Yun Chin ,  Chii-Horng Li ,  Chien-Wei Lee ,  Hsueh-Chang Sung ,  Heng-Wen Ting ,  Roger Tai ,  Pei-Ren Jeng ,  Tzu-Hsiang Hsu ,  Yen-Ru Lee ,  Yan-Ting Lin ,  Davie Liu

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/165 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/08

CPC classification number: H01L29/785 ,  H01L21/762 ,  H01L21/823431 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6681 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7848

Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a substrate. A fin is on the substrate. The fin includes silicon germanium. An interfacial layer is over the fin. The interfacial layer has a thickness in a range from greater than 0 nm to about 4 nm. A source/drain region is over the interfacial layer. The source/drain region includes silicon germanium.

公开(公告)号：US20220376049A1

公开(公告)日：2022-11-24

申请号：US17875644

申请日：2022-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Yun Chin ,  Chii-Horng Li ,  Chien-Wei Lee ,  Hsueh-Chang Sung ,  Heng-Wen Ting ,  Roger Tai ,  Pei-Ren Jeng ,  Tzu-Hsiang Hsu ,  Yen-Ru Lee ,  Yan-Ting Lin ,  Davie Liu

IPC: H01L29/08 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165

Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a substrate. A fin is on the substrate. The fin includes silicon germanium. An interfacial layer is over the fin. The interfacial layer has a thickness in a range from greater than 0 nm to about 4 nm. A source/drain region is over the interfacial layer. The source/drain region includes silicon germanium.

公开(公告)号：US20180337283A1

公开(公告)日：2018-11-22

申请号：US16048822

申请日：2018-07-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO, LTD

Inventor： Chii-Horng Li ,  Chih-Shan Chen ,  Roger Tai ,  Yih-Ann Lin ,  Yen-Ru Lee ,  Tzu-Ching Lin

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/3065 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L29/7851 ,  H01L21/3065 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/7848

Abstract: A semiconductor device includes a semiconductor base. A dielectric isolation structure is formed in the semiconductor base. A source/drain of a FinFET transistor is formed on the semiconductor base. A bottom segment of the source/drain is embedded into the semiconductor base. The bottom segment of the source/drain has a V-shaped cross-sectional profile. The bottom segment of the source/drain is separated from the dielectric isolation structure by portions of the semiconductor base.

公开(公告)号：US10038095B2

公开(公告)日：2018-07-31

申请号：US15235899

申请日：2016-08-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chii-Horng Li ,  Chih-Shan Chen ,  Roger Tai ,  Yih-Ann Lin ,  Yen-Ru Lee ,  Tzu-Ching Lin

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7851 ,  H01L21/3065 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/7848

Abstract: A semiconductor device includes a semiconductor base. A dielectric isolation structure is formed in the semiconductor base. A source/drain of a FinFET transistor is formed on the semiconductor base. A bottom segment of the source/drain is embedded into the semiconductor base. The bottom segment of the source/drain has a V-shaped cross-sectional profile. The bottom segment of the source/drain is separated from the dielectric isolation structure by portions of the semiconductor base.

公开(公告)号：US10651309B2

公开(公告)日：2020-05-12

申请号：US16048822

申请日：2018-07-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chii-Horng Li ,  Chih-Shan Chen ,  Roger Tai ,  Yih-Ann Lin ,  Yen-Ru Lee ,  Tzu-Ching Lin

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor base. A dielectric isolation structure is formed in the semiconductor base. A source/drain of a FinFET transistor is formed on the semiconductor base. A bottom segment of the source/drain is embedded into the semiconductor base. The bottom segment of the source/drain has a V-shaped cross-sectional profile. The bottom segment of the source/drain is separated from the dielectric isolation structure by portions of the semiconductor base.

公开(公告)号：US11482620B2

公开(公告)日：2022-10-25

申请号：US17194994

申请日：2021-03-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Yun Chin ,  Chii-Horng Li ,  Chien-Wei Lee ,  Hsueh-Chang Sung ,  Heng-Wen Ting ,  Roger Tai ,  Pei-Ren Jeng ,  Tzu-Hsiang Hsu ,  Yen-Ru Lee ,  Yan-Ting Lin ,  Davie Liu

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/165 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/08

Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a substrate. A fin is on the substrate. The fin includes silicon germanium. An interfacial layer is over the fin. The interfacial layer has a thickness in a range from greater than 0 nm to about 4 nm. A source/drain region is over the interfacial layer. The source/drain region includes silicon germanium.

公开(公告)号：US20210193831A1

公开(公告)日：2021-06-24

申请号：US17194994

申请日：2021-03-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Yun Chin ,  Chii-Horng Li ,  Chien-Wei Lee ,  Hsueh-Chang Sung ,  Heng-Wen Ting ,  Roger Tai ,  Pei-Ren Jeng ,  Tzu-Hsiang Hsu ,  Yen-Ru Lee ,  Yan-Ting Lin ,  Davie Liu

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/165 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/08

Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a substrate. A fin is on the substrate. The fin includes silicon germanium. An interfacial layer is over the fin. The interfacial layer has a thickness in a range from greater than 0 nm to about 4 nm. A source/drain region is over the interfacial layer. The source/drain region includes silicon germanium.

公开(公告)号：US20200273993A1

公开(公告)日：2020-08-27

申请号：US16872235

申请日：2020-05-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chii-Horng Li ,  Chih-Shan Chen ,  Roger Tai ,  Yih-Ann Lin ,  Yen-Ru Lee ,  Tzu-Ching Lin

IPC: H01L29/78 ,  H01L21/3065 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor base. A dielectric isolation structure is formed in the semiconductor base. A source/drain of a FinFET transistor is formed on the semiconductor base. A bottom segment of the source/drain is embedded into the semiconductor base. The bottom segment of the source/drain has a V-shaped cross-sectional profile. The bottom segment of the source/drain is separated from the dielectric isolation structure by portions of the semiconductor base.