公开(公告)号：US20250006587A1

公开(公告)日：2025-01-02

申请号：US18341897

申请日：2023-06-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Chiang Ting ,  Sung-Feng Yeh ,  Ta Hao Sung ,  Shu-Yan Jhu

IPC: H01L23/42 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

Abstract: A semiconductor package with a dummy die having two layers with different thermal conductivities and the method of forming the same are provided. The semiconductor package may include a first semiconductor die, a first bonding layer on the first semiconductor die, a second semiconductor die bonded to the first bonding layer, and a first dummy die bonded to the first bonding layer. The first dummy die may include a substrate, a material layer between the substrate and the first bonding layer, and a second bonding layer between the material layer and the first bonding layer. The material layer may include a first material with a first thermal conductivity and the second bonding layer may include a second material with a second thermal conductivity different from the first thermal conductivity.

公开(公告)号：US20240213236A1

公开(公告)日：2024-06-27

申请号：US18151629

申请日：2023-01-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shu-Yan Jhu ,  Kuo-Chiang Ting ,  Sung-Feng Yeh

IPC: H01L25/18 ,  H01L21/56 ,  H01L23/00 ,  H01L23/36 ,  H01L23/48

CPC classification number: H01L25/18 ,  H01L21/56 ,  H01L23/36 ,  H01L23/481 ,  H01L24/05 ,  H01L24/08 ,  H01L24/29 ,  H01L24/32 ,  H01L24/80 ,  H01L2224/05647 ,  H01L2224/08146 ,  H01L2224/29186 ,  H01L2224/32245 ,  H01L2224/80379 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A semiconductor device includes a first semiconductor package comprising: a first interconnect structure on a first semiconductor substrate; through substrate vias electrically coupled to the first interconnect structure extending through the first semiconductor substrate; and a second semiconductor package directly bonded to the first semiconductor package, the second semiconductor package comprising a second semiconductor substrate and a second interconnect structure on the second semiconductor substrate. The semiconductor device further includes a silicon layer on a surface of the second semiconductor package that is opposite to the first semiconductor package; and a heat dissipation structure attached to the silicon layer.