公开(公告)号：US09536964B2

公开(公告)日：2017-01-03

申请号：US14725002

申请日：2015-05-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Yin Shiao ,  Che-Cheng Chang ,  Tai-Shin Cheng ,  Wei-Ting Chen

IPC: H01L29/41 ,  H01L29/417 ,  H01L29/66 ,  H01L21/768

CPC classification number: H01L21/76816 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76877 ,  H01L23/485 ,  H01L29/4175 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric layer over the first metal layer. The method includes forming an antireflection layer over the dielectric layer, forming a hard mask layer over the antireflection layer and forming a patterned photoresist layer over the hard mask layer. The method includes etching a portion of the antireflection layer by performing a first etching process and etching through the antireflection layer and etching a portion of the dielectric layer by performing a second etching process. The method includes etching through the dielectric layer by performing a third etching process to form a via portion on the first metal layer. The via portion includes a first sidewall and a second sidewall, and the slope of the first sidewall is different from that of the second sidewall.

Abstract translation: 提供了一种形成半导体器件结构的方法。 该方法包括在衬底上形成第一金属层，并在第一金属层上形成电介质层。 该方法包括在电介质层上形成抗反射层，在抗反射层上形成硬掩模层，并在硬掩模层上形成图案化的光致抗蚀剂层。 该方法包括通过执行第一蚀刻工艺和蚀刻穿过抗反射层并通过执行第二蚀刻工艺蚀刻介电层的一部分来蚀刻抗反射层的一部分。 该方法包括通过执行第三蚀刻工艺来蚀刻通过介电层，以在第一金属层上形成通孔部分。 通孔部分包括第一侧壁和第二侧壁，并且第一侧壁的斜面与第二侧壁的斜面不同。

公开(公告)号：US09425087B1

公开(公告)日：2016-08-23

申请号：US14725600

申请日：2015-05-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Ting Chen ,  Che-Cheng Chang ,  Tai-Shin Cheng ,  Wei-Yin Shiao

IPC: H01L21/4763 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76814 ,  H01L21/02063 ,  H01L21/76811 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53295

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a semiconductor substrate. The method includes forming a mask layer over the dielectric layer. The mask layer has an opening exposing a portion of the dielectric layer. The method includes removing the portion of the dielectric layer through the opening to form a recess in the dielectric layer. The method includes removing the mask layer. The method includes performing a plasma cleaning process over the dielectric layer. The plasma cleaning process uses a carbon dioxide-containing gas.

Abstract translation: 提供一种形成半导体器件结构的方法。 该方法包括在半导体衬底上形成电介质层。 该方法包括在电介质层上形成掩模层。 掩模层具有露出电介质层的一部分的开口。 该方法包括通过开口去除电介质层的部分，以在电介质层中形成凹陷。 该方法包括去除掩模层。 该方法包括在电介质层上执行等离子体清洗工艺。 等离子体清洁过程使用含二氧化碳的气体。

公开(公告)号：US09761488B2

公开(公告)日：2017-09-12

申请号：US14802734

申请日：2015-07-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Tai-Shin Cheng ,  Che-Cheng Chang ,  Wei-Ting Chen ,  Wei-Yin Shiao

IPC: H01L21/76 ,  H01L21/768 ,  H01L21/311 ,  H01L21/02 ,  H01L21/027

CPC classification number: H01L21/76883 ,  H01L21/02063 ,  H01L21/02068 ,  H01L21/02178 ,  H01L21/0276 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814

Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a metal layer in a first dielectric layer over a substrate and forming an etch stop layer over the metal layer. The etch stop layer is made of metal-containing material. The method also includes forming a second dielectric layer over the etch stop layer and removing a portion of the second dielectric layer to expose the etch stop layer and to form a via by an etching process. The method further includes performing a plasma cleaning process on the via and the second dielectric layer, and the plasma cleaning process is performed by using a plasma including nitrogen gas (N2) and hydrogen gas (H2).

公开(公告)号：US09997520B2

公开(公告)日：2018-06-12

申请号：US14815419

申请日：2015-07-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tai-Shin Cheng ,  Che-Cheng Chang

IPC: H01L29/00 ,  H01L27/108 ,  H01L49/02 ,  H01L23/48 ,  H01L23/522

CPC classification number: H01L27/10808 ,  H01L23/481 ,  H01L23/5223 ,  H01L27/10855 ,  H01L28/86 ,  H01L28/87 ,  H01L28/91

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a conductive structure in or over the substrate. The semiconductor device structure includes a first dielectric layer over the substrate. The first dielectric layer has a first opening exposing the conductive structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer. The second dielectric layer has a second opening connected to the first opening and exposing the conductive structure. The semiconductor device structure includes a capacitor covering a first inner wall of the first opening, a second inner wall of the second opening, and a top surface of the conductive structure. The capacitor is electrically connected to the conductive structure.