公开(公告)号：US20190088762A1

公开(公告)日：2019-03-21

申请号：US15706456

申请日：2017-09-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Huan-Chieh SU ,  Zhi-Chang LIN ,  Ting-Hung HSU ,  Jia-Ni YU ,  Wei-Hao WU ,  Chih-Hao WANG

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088

CPC classification number: H01L29/66545 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/6681

Abstract: A method for manufacturing a semiconductor device is provided. The method for manufacturing a semiconductor device includes forming a gate electrode layer in a gate trench; filling a recess in the gate electrode layer with a dielectric feature; and etching back the gate electrode layer from top end surfaces of the gate electrode layer while leaving a portion of the gate electrode layer under the dielectric feature.

公开(公告)号：US20200083340A1

公开(公告)日：2020-03-12

申请号：US16683486

申请日：2019-11-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Hao WU ,  Zhi-Chang LIN ,  Ting-Hung HSU ,  Kuan-Lun CHENG

IPC: H01L29/423 ,  H01L27/088 ,  H01L29/08 ,  H01L27/12 ,  H01L27/06 ,  H01L21/822 ,  H01L29/775 ,  H01L29/66 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/762 ,  B82Y10/00 ,  H01L27/092 ,  H01L29/786

Abstract: A semiconductor device includes a first device formed over a substrate. The first device includes a first gate stack encircling a first nanostructure, and the first device is a logic circuit device. The semiconductor device includes a second device formed over the first device. The second device includes a second gate stack encircling a second nanostructure, and the second device is a static random access memory (SRAM).

公开(公告)号：US20190229201A1

公开(公告)日：2019-07-25

申请号：US16373988

申请日：2019-04-03

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Hao WU ,  Zhi-Chang LIN ,  Ting-Hung HSU ,  Kuan-Lun CHENG

IPC: H01L29/423 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/762 ,  H01L27/12

Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor strip over a substrate. The semiconductor strip includes a first semiconductor stack and a second semiconductor stack over the first semiconductor stack. A dummy gate stack is formed to cross the semiconductor strip. The dummy gate stack is replaced with a first metal gate stack and a second metal gate stack. The first metal gate stack is in contact with the first semiconductor layer of the first semiconductor stack and the second metal gate stack is in contact with the first semiconductor layer of the second semiconductor stack.

公开(公告)号：US20190097011A1

公开(公告)日：2019-03-28

申请号：US15716699

申请日：2017-09-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Hao WU ,  Zhi-Chang LIN ,  Ting-Hung HSU ,  Kuan-Lun CHENG

IPC: H01L29/423 ,  H01L21/762 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/12

Abstract: A semiconductor device includes a substrate, a first device with a horizontal-gate-all-around configuration, and a second device with a horizontal-gate-all-around configuration. The first device is over the substrate. The second device is over the first device. A channel of the first device is between the substrate and a channel of the second device.