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    SOURCE/DRAIN REGIONS OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
    1.
    发明申请
    SOURCE/DRAIN REGIONS OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME 有权

    公开(公告)号：US20240387629A1

    公开(公告)日：2024-11-21

    申请号：US18786808

    申请日：2024-07-29

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Min Liu ,  Li-Li Su ,  Chii-Horng Li ,  Yee-Chia Yeo

    IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/786

    Abstract: A device includes a first nanostructure over a semiconductor substrate; a second nanostructure over the first nanostructure; a gate structure surrounding the first nanostructure and the second nanostructure; a first epitaxial region in the semiconductor substrate adjacent the gate structure, wherein the first epitaxial region is a first doped semiconductor material; and a second epitaxial region over the first epitaxial region, wherein the second epitaxial region is adjacent the first nanostructure and the second nanostructure, wherein the second epitaxial region is a second doped semiconductor material that is different from the first doped semiconductor material. In an embodiment, the first doped semiconductor material has a smaller doping concentration than the second doped semiconductor material.

    Semiconductor device having a multilayer source/drain region and methods of manufacture
    2.
    发明授权
    Semiconductor device having a multilayer source/drain region and methods of manufacture 有权

    公开(公告)号：US12132118B2

    公开(公告)日：2024-10-29

    申请号：US17231183

    申请日：2021-04-15

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Min Liu ,  Li-Li Su ,  Yee-Chia Yeo

    IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66

    CPC classification number: H01L29/78696 ,  H01L29/0665 ,  H01L29/66742

    Abstract: Semiconductor devices and methods of fabricating the semiconductor devices are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin as an initial step in forming a source/drain region. The opening is formed into a parasitic channel region of the fin. Once the opening has been formed, a first semiconductor material is epitaxially grown at the bottom of the opening to a level over the top of the parasitic channel region. A second semiconductor material is epitaxially grown from the top of the first semiconductor material to fill and/or overfill the opening. The second semiconductor material is differently doped from the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.

    Semiconductor Device and Method
    4.
    发明申请
    Semiconductor Device and Method 有权

    公开(公告)号：US20220359742A1

    公开(公告)日：2022-11-10

    申请号：US17815020

    申请日：2022-07-26

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Min Liu ,  Li-Li Su ,  Yee-Chia Yeo

    IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

    Abstract: A device includes a first fin and a second fin extending from a substrate, the first fin including a first recess and the second fin including a second recess, an isolation region surrounding the first fin and surrounding the second fin, a gate stack over the first fin and the second fin, and a source/drain region in the first recess and in the second recess, the source/drain region adjacent the gate stack, wherein the source/drain region includes a bottom surface extending from the first fin to the second fin, wherein a first portion of the bottom surface that is below a first height above the isolation region has a first slope, and wherein a second portion of the bottom surface that is above the first height has a second slope that is greater than the first slope.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE
    5.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE 有权

    公开(公告)号：US20220336677A1

    公开(公告)日：2022-10-20

    申请号：US17231183

    申请日：2021-04-15

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Min Liu ,  Li-Li Su ,  Yee-Chia Yeo

    IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66

    Abstract: Semiconductor devices and methods of fabricating the semiconductor devices are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin as an initial step in forming a source/drain region. The opening is formed into a parasitic channel region of the fin. Once the opening has been formed, a first semiconductor material is epitaxially grown at the bottom of the opening to a level over the top of the parasitic channel region. A second semiconductor material is epitaxially grown from the top of the first semiconductor material to fill and/or overfill the opening. The second semiconductor material is differently doped from the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.

    Source/Drain Structures and Method of Forming
    6.
    发明申请
    Source/Drain Structures and Method of Forming 有权

    公开(公告)号：US20220319934A1

    公开(公告)日：2022-10-06

    申请号：US17218459

    申请日：2021-03-31

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Min Liu ,  Hsueh-Chang Sung ,  Li-Li Su ,  Yee-Chia Yeo

    IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/08 ,  H01L29/49 ,  H01L29/78 ,  H01L29/66

    Abstract: A semiconductor device includes a first device region and a second device region. The first device region includes a first source/drain region extending from a substrate and a first and a second pair of spacers. The first source/drain region extends between the first pair of spacers and the second pair of spacers. The first pair of spacers and the second pair of spacers have a first height. The second device region includes a second and a third source/drain region extending from the substrate and a third and a fourth pair of spacers. The third source/drain region is separate from the second source/drain region. The second source/drain region extends between the third pair of spacers. The third source/drain region extends between the fourth pair of spacers. The third pair of spacers and the fourth pair of spacers have a second height greater than the first height.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE 有权

    公开(公告)号：US20210273102A1

    公开(公告)日：2021-09-02

    申请号：US16941427

    申请日：2020-07-28

    Applicant: Taiwan Semiconductor Manufacturing co., Ltd

    Inventor： Li-Li Su ,  Wei-Min Liu ,  Wei-Hao Lu ,  Chien-l Kuo ,  Yee-chia Yeo

    IPC: H01L29/78 ,  H01L29/66 ,  H01L21/8234

    Abstract: A device includes a fin extending from a substrate; a gate stack over and along sidewalls of the fin; a gate spacer along a sidewall of the gate stack; an epitaxial source/drain region in the fin and adjacent the gate spacer, the epitaxial source/drain region including a first epitaxial layer on the fin, the first epitaxial layer including silicon and arsenic; and a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including silicon and phosphorus, the first epitaxial layer separating the second epitaxial layer from the fin; and a contact plug on the second epitaxial layer.

    Semiconductor Device and Method
    8.
    发明申请
    Semiconductor Device and Method 有权

    公开(公告)号：US20210134681A1

    公开(公告)日：2021-05-06

    申请号：US16889397

    申请日：2020-06-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Min Liu ,  Hsueh-Chang Sung ,  Yee-Chia Yeo

    IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L29/66

    Abstract: A method includes forming a gate structure over fins protruding from a semiconductor substrate; forming an isolation region surrounding the fins; depositing a spacer layer over the gate structure and over the fins, wherein the spacer layer fills the regions extending between pairs of adjacent fins; performing a first etch on the spacer layer, wherein after performing the first etch, first remaining portions of the spacer layer that are within inner regions extending between pairs of adjacent fins have a first thickness and second remaining portions of the spacer layer that are not within the inner regions have a second thickness less than the first thickness; and forming an epitaxial source/drain region adjacent the gate structure and extending over the fins, wherein portions of the epitaxial source/drain region within the inner regions are separated from the first remaining portions of the spacer layer.

    Source/drain epitaxial layers for transistors
    9.
    发明授权
    Source/drain epitaxial layers for transistors 有权

    公开(公告)号：US12243931B2

    公开(公告)日：2025-03-04

    申请号：US18311071

    申请日：2023-05-02

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Wei-Min Liu ,  Yee-Chia Yeo ,  Li-Li Su

    IPC: H01L29/66 ,  H01L29/04 ,  H01L29/08 ,  H01L29/78

    Abstract: The present disclosure is directed to methods for forming source/drain (S/D) epitaxial structures with a hexagonal shape. The method includes forming a fin structure that includes a first portion and a second portion proximate to the first portion, forming a gate structure on the first portion of the fin structure, and recessing the second portion of the fin structure. The method further includes growing a S/D epitaxial structure on the recessed second portion of the fin structure, where growing the S/D epitaxial structure includes exposing the recessed second portion of the fin structure to a precursor and one or more reactant gases to form a portion of the S/D epitaxial structure. Growing the S/D epitaxial structure further includes exposing the portion of the S/D structure to an etching chemistry and exposing the portion of the S/D epitaxial structure to a hydrogen treatment to enhance growth of the S/D epitaxial structure.

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