公开(公告)号：US09870612B2

公开(公告)日：2018-01-16

申请号：US15254607

申请日：2016-09-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shinn-Sheng Yu ,  Anthony Yen ,  Wen-Chuan Wang ,  Sheng-Chi Chin

IPC: G06K9/00 ,  G06T7/00 ,  H01L21/027 ,  G03F1/72 ,  G03F1/24 ,  G03F1/26

CPC classification number: G06T7/0004 ,  G03F1/24 ,  G03F1/26 ,  G03F1/72 ,  G03F1/84 ,  G06T7/001 ,  G06T7/0081 ,  G06T7/11 ,  G06T2207/10004 ,  G06T2207/10056 ,  G06T2207/30148 ,  H01L21/0273

Abstract: A method includes inspecting a mask to locate a defect region for a defect of the mask. A phase distribution of an aerial image of the defect region is acquired. A point spread function of an imaging system is determined. One or more repair regions of the mask are identified based on the phase distribution of the aerial image of the defect region and the point spread function. A repair process is performed to the one or more repair regions of the mask to form one or more repair features.

公开(公告)号：US20210208505A1

公开(公告)日：2021-07-08

申请号：US17206722

申请日：2021-03-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shinn-Sheng Yu ,  Ching-Fang Yu ,  Wen-Chuan Wang ,  Ting-Hao Hsu ,  Sheng-Chi Chin ,  Anthony Yen

IPC: G03F7/20 ,  G03F1/24 ,  G03F1/52

Abstract: An extreme ultraviolet lithography method is disclosed. In an example, the EUVL method includes forming a resist layer on a substrate; performing a first exposure process to image a first pattern of a first sub-region of a first mask to the resist layer; performing a second exposure process to image a second pattern of a second sub-region of the first mask to the resist layer; and performing a third exposure process to image a third pattern of a first sub-region of a second mask to the resist layer. The second and third patterns are identical to the first pattern. The first, second and third exposure processes collectively form a latent image of the first pattern on the resist layer.

公开(公告)号：US11100272B2

公开(公告)日：2021-08-24

申请号：US16542087

申请日：2019-08-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cheng-Chi Wu ,  Wen-Chuan Wang

IPC: G06F30/30 ,  G03F7/20 ,  G01N23/2251 ,  G06F30/398 ,  G06F30/392

Abstract: A method includes obtaining a layout of a circuit pattern implemented on a semiconductor wafer, and identifying one or more polygons in the layout based on a length criteria. One or more measurement gauges are placed on the identified polygons to thereby obtain measured polygons. A scanning electron microscope (SEM) image of the circuit pattern is obtained. The SEM image is aligned with the layout including the measured polygons. A critical dimension of one or more objects in the SEM image is measured. The one or more objects correspond to the one or more polygons. Based on the measured critical dimension, it is determined whether the circuit pattern is acceptable.

公开(公告)号：US20190033720A1

公开(公告)日：2019-01-31

申请号：US15861156

申请日：2018-01-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shinn-Sheng Yu ,  Ching-Fang Yu ,  Wen-Chuan Wang ,  Ting-Hao Hsu ,  Sheng-Chi Chin ,  Anthony Yen

IPC: G03F7/20 ,  G03F1/24 ,  G03F1/52

Abstract: An extreme ultraviolet lithography method is disclosed. In an example, the EUVL method includes forming a resist layer on a substrate; performing a first exposure process to image a first pattern of a first sub-region of a first mask to the resist layer; performing a second exposure process to image a second pattern of a second sub-region of the first mask to the resist layer; and performing a third exposure process to image a third pattern of a first sub-region of a second mask to the resist layer. The second and third patterns are identical to the first pattern. The first, second and third exposure processes collectively form a latent image of the first pattern on the resist layer.

公开(公告)号：US20170082926A1

公开(公告)日：2017-03-23

申请号：US15370174

申请日：2016-12-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Burn Jeng Lin ,  Shy-Jay Lin ,  Jaw-Jung Shin ,  Wen-Chuan Wang

IPC: G03F7/20

CPC classification number: G03F7/70275 ,  G03F7/70008 ,  G03F7/7015 ,  G03F7/70208 ,  G03F7/70358 ,  G03F7/70716 ,  G03F7/70725 ,  H01L21/682

Abstract: The present disclosure provides a lithography system comprising a radiation source and an exposure tool including a plurality of exposure columns densely packed in a first direction. Each exposure column includes an exposure area configured to pass the radiation source. The system also includes a wafer carrier configured to secure and move one or more wafers along a second direction that is perpendicular to the first direction, so that the one or more wafers are exposed by the exposure tool to form patterns along the second direction. The one or more wafers are covered with resist layer and aligned in the second direction on the wafer carrier.

公开(公告)号：US10955746B2

公开(公告)日：2021-03-23

申请号：US15861156

申请日：2018-01-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shinn-Sheng Yu ,  Ching-Fang Yu ,  Wen-Chuan Wang ,  Ting-Hao Hsu ,  Sheng-Chi Chin ,  Anthony Yen

IPC: G03F7/20 ,  G03F1/24 ,  G03F1/52

Abstract: An extreme ultraviolet lithography method is disclosed. In an example, the EUVL method includes forming a resist layer on a substrate; performing a first exposure process to image a first pattern of a first sub-region of a first mask to the resist layer; performing a second exposure process to image a second pattern of a second sub-region of the first mask to the resist layer; and performing a third exposure process to image a third pattern of a first sub-region of a second mask to the resist layer. The second and third patterns are identical to the first pattern. The first, second and third exposure processes collectively form a latent image of the first pattern on the resist layer.