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公开(公告)号:US20240332076A1
公开(公告)日:2024-10-03
申请号:US18738443
申请日:2024-06-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Yip Loh , Chih-Wei Chang , Hong-Mao Lee , Chun-Hsien Huang , Yu-Ming Huang , Yan-Ming Tsai , Yu-Shiuan Wang , Hung-Hsu Chen , Yu-Kai Chen , Yu-Wen Cheng
IPC: H01L21/768 , H01L21/285 , H01L21/8234 , H01L23/522 , H01L29/08 , H01L29/417 , H01L29/66 , H01L29/78
CPC classification number: H01L21/76856 , H01L21/76805 , H01L21/823425 , H01L21/823475 , H01L23/5226 , H01L29/0847 , H01L29/41791 , H01L29/66795 , H01L21/28518 , H01L29/785
Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
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公开(公告)号:US09711402B1
公开(公告)日:2017-07-18
申请号:US15063905
申请日:2016-03-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Hsien Huang , Hong-Mao Lee , Hsien-Lung Yang , Yu-Kai Chen , Wei-Jung Lin
IPC: H01L21/76 , H01L21/768 , H01L21/8238
CPC classification number: H01L21/76895 , H01L21/76805 , H01L21/76807 , H01L21/76843 , H01L21/76889 , H01L21/823814 , H01L21/823821 , H01L21/823871
Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming a source/drain feature over a substrate, forming a dielectric layer over the source/drain feature, forming a contact trench through the dielectric layer to expose the source/drain feature, depositing a titanium nitride (TiN) layer by a first atomic layer deposition (ALD) process in the contact trench and depositing a cobalt layer over the TiN layer in the contact trench.
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公开(公告)号:US20220148920A1
公开(公告)日:2022-05-12
申请号:US17580904
申请日:2022-01-21
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chun-Hsien Huang , Hong-Mao Lee , Hsien-Lung Yang , Yu-Kai Chen , Wei-Jung Lin
IPC: H01L21/768 , H01L29/417 , H01L29/66 , H01L29/78 , H01L21/8238
Abstract: A semiconductor device is disclosed. The device includes a source/drain feature formed over a substrate. A dielectric layer formed over the source/drain feature. A contact trench formed through the dielectric layer to expose the source/drain feature. A titanium nitride (TiN) layer deposited in the contact trench and a cobalt layer deposited over the TiN layer in the contact trench.
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公开(公告)号:US11232985B2
公开(公告)日:2022-01-25
申请号:US16571536
申请日:2019-09-16
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chun-Hsien Huang , Hong-Mao Lee , Hsien-Lung Yang , Yu-Kai Chen , Wei-Jung Lin
IPC: H01L29/66 , H01L21/768 , H01L29/417 , H01L29/78 , H01L21/8238
Abstract: A semiconductor device is disclosed. The device includes a source/drain feature formed over a substrate. A dielectric layer formed over the source/drain feature. A contact trench formed through the dielectric layer to expose the source/drain feature. A titanium nitride (TiN) layer deposited in the contact trench and a cobalt layer deposited over the TiN layer in the contact trench.
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公开(公告)号:US11067897B1
公开(公告)日:2021-07-20
申请号:US16881221
申请日:2020-05-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Hung Chen , Yu-Kai Chen
IPC: G03F7/40
Abstract: A photoresist baking apparatus is provided. The photoresist baking apparatus includes a baking chamber, a hot plate, an exhaust line, and a cover plate. The baking chamber has an exhaust port on a sidewall thereof. The hot plate is disposed in the baking chamber and is configured to support a wafer and heat a photoresist material over the wafer. The exhaust line is coupled to the exhaust port and is configured to exhaust out the atmosphere inside the baking chamber. The cover plate is disposed over the hot plate and between the hot plate and the exhaust port. The cover plate has multiple exhaust holes to allow air to flow through. The size of one of the exhaust holes farther from the exhaust port is larger than the size of one of the exhaust holes closer to the exhaust port.
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公开(公告)号:US12211747B2
公开(公告)日:2025-01-28
申请号:US18360587
申请日:2023-07-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Hsien Huang , Hong-Mao Lee , Hsien-Lung Yang , Yu-Kai Chen , Wei-Jung Lin
IPC: H01L29/41 , H01L21/768 , H01L21/8238 , H01L29/417 , H01L29/66 , H01L29/78
Abstract: A semiconductor device is disclosed. The device includes a source/drain feature formed over a substrate. A dielectric layer formed over the source/drain feature. A contact trench formed through the dielectric layer to expose the source/drain feature. A titanium nitride (TiN) layer deposited in the contact trench and a cobalt layer deposited over the TiN layer in the contact trench.
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公开(公告)号:US11791208B2
公开(公告)日:2023-10-17
申请号:US17580904
申请日:2022-01-21
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chun-Hsien Huang , Hong-Mao Lee , Hsien-Lung Yang , Yu-Kai Chen , Wei-Jung Lin
IPC: H01L29/41 , H01L21/768 , H01L29/417 , H01L29/66 , H01L29/78 , H01L21/8238
CPC classification number: H01L21/76895 , H01L21/76805 , H01L21/76807 , H01L21/76843 , H01L21/76889 , H01L21/823814 , H01L21/823821 , H01L21/823871 , H01L29/41791 , H01L29/665 , H01L29/66795 , H01L29/7851
Abstract: A semiconductor device is disclosed. The device includes a source/drain feature formed over a substrate. A dielectric layer formed over the source/drain feature. A contact trench formed through the dielectric layer to expose the source/drain feature. A titanium nitride (TiN) layer deposited in the contact trench and a cobalt layer deposited over the TiN layer in the contact trench.
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公开(公告)号:US20210296168A1
公开(公告)日:2021-09-23
申请号:US17339082
申请日:2021-06-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Yip Loh , Chih-Wei Chang , Hong-Mao Lee , Chun-Hsien Huang , Yu-Ming Huang , Yan-Ming Tsai , Yu-Shiuan Wang , Hung-Hsu Chen , Yu-Kai Chen , Yu-Wen Cheng
IPC: H01L21/768 , H01L21/8234 , H01L29/08 , H01L23/522 , H01L29/417 , H01L29/66
Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
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公开(公告)号:US11031286B2
公开(公告)日:2021-06-08
申请号:US15909762
申请日:2018-03-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Yip Loh , Chih-Wei Chang , Hong-Mao Lee , Chun-Hsien Huang , Yu-Ming Huang , Yan-Ming Tsai , Yu-Shiuan Wang , Hung-Hsu Chen , Yu-Kai Chen , Yu-Wen Cheng
IPC: H01L21/768 , H01L21/8234 , H01L29/08 , H01L23/522 , H01L29/417 , H01L29/66 , H01L29/78 , H01L21/285
Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
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公开(公告)号:US12046510B2
公开(公告)日:2024-07-23
申请号:US17339082
申请日:2021-06-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Yip Loh , Chih-Wei Chang , Hong-Mao Lee , Chun-Hsien Huang , Yu-Ming Huang , Yan-Ming Tsai , Yu-Shiuan Wang , Hung-Hsu Chen , Yu-Kai Chen , Yu-Wen Cheng
IPC: H01L21/768 , H01L21/8234 , H01L23/522 , H01L29/08 , H01L29/417 , H01L29/66 , H01L21/285 , H01L29/78
CPC classification number: H01L21/76856 , H01L21/76805 , H01L21/823425 , H01L21/823475 , H01L23/5226 , H01L29/0847 , H01L29/41791 , H01L29/66795 , H01L21/28518 , H01L29/785
Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
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