公开(公告)号：US11411094B2

公开(公告)日：2022-08-09

申请号：US16740881

申请日：2020-01-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wen Cheng ,  Cheng-Tung Lin ,  Chih-Wei Chang ,  Hong-Mao Lee ,  Ming-Hsing Tsai ,  Sheng-Hsuan Lin ,  Wei-Jung Lin ,  Yan-Ming Tsai ,  Yu-Shiuan Wang ,  Hung-Hsu Chen ,  Wei-Yip Loh ,  Ya-Yi Cheng

IPC: H01L29/66 ,  H01L29/45 ,  H01L21/768 ,  H01L21/02 ,  H01L21/326 ,  H01L29/78 ,  H01L29/08 ,  H01L21/311 ,  H01L21/306 ,  H01L21/266 ,  H01L21/265 ,  H01L21/3105 ,  H01L21/321

Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.

公开(公告)号：US10332789B2

公开(公告)日：2019-06-25

申请号：US15887819

申请日：2018-02-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tien-Pei Chou ,  Ken-Yu Chang ,  Chun-Chieh Wang ,  Yueh-Ching Pai ,  Yu-Ting Lin ,  Yu-Wen Cheng

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L29/78 ,  H01L23/522 ,  H01L21/8234 ,  H01L29/417 ,  C23C16/02 ,  C23C16/455

Abstract: The present disclosure relates generally to techniques for forming a continuous adhesion layer for a contact plug. A method includes forming an opening through a dielectric layer to an active area on a substrate. The method includes performing a first plasma treatment along a sidewall of the opening. The method includes performing an atomic layer deposition (ALD) process to form a metal nitride layer along the sidewall of the opening. The ALD process includes a plurality of cycles. Each cycle includes flowing a precursor to form a metal monolayer along the sidewall and performing a second plasma treatment to treat the metal monolayer with nitrogen. The method includes depositing a conductive material on the metal nitride layer in the opening to form a conductive feature.

公开(公告)号：US20220367667A1

公开(公告)日：2022-11-17

申请号：US17869521

申请日：2022-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wen Cheng ,  Cheng-Tung Lin ,  Chih-Wei Chang ,  Hong-Mao Lee ,  Ming-Hsing Tsai ,  Sheng-Hsuan Lin ,  Wei-Jung Lin ,  Yan-Ming Tsai ,  Yu-Shiuan Wang ,  Hung-Hsu Chen ,  Wei-Yip Loh ,  Ya-Yi Cheng

IPC: H01L29/66 ,  H01L29/45 ,  H01L21/768 ,  H01L21/02 ,  H01L21/326 ,  H01L29/78 ,  H01L29/08

Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.

公开(公告)号：US20210296168A1

公开(公告)日：2021-09-23

申请号：US17339082

申请日：2021-06-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Yip Loh ,  Chih-Wei Chang ,  Hong-Mao Lee ,  Chun-Hsien Huang ,  Yu-Ming Huang ,  Yan-Ming Tsai ,  Yu-Shiuan Wang ,  Hung-Hsu Chen ,  Yu-Kai Chen ,  Yu-Wen Cheng

IPC: H01L21/768 ,  H01L21/8234 ,  H01L29/08 ,  H01L23/522 ,  H01L29/417 ,  H01L29/66

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

公开(公告)号：US11031286B2

公开(公告)日：2021-06-08

申请号：US15909762

申请日：2018-03-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Yip Loh ,  Chih-Wei Chang ,  Hong-Mao Lee ,  Chun-Hsien Huang ,  Yu-Ming Huang ,  Yan-Ming Tsai ,  Yu-Shiuan Wang ,  Hung-Hsu Chen ,  Yu-Kai Chen ,  Yu-Wen Cheng

IPC: H01L21/768 ,  H01L21/8234 ,  H01L29/08 ,  H01L23/522 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/285

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

公开(公告)号：US12046510B2

公开(公告)日：2024-07-23

申请号：US17339082

申请日：2021-06-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Yip Loh ,  Chih-Wei Chang ,  Hong-Mao Lee ,  Chun-Hsien Huang ,  Yu-Ming Huang ,  Yan-Ming Tsai ,  Yu-Shiuan Wang ,  Hung-Hsu Chen ,  Yu-Kai Chen ,  Yu-Wen Cheng

IPC: H01L21/768 ,  H01L21/8234 ,  H01L23/522 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L21/285 ,  H01L29/78

CPC classification number: H01L21/76856 ,  H01L21/76805 ,  H01L21/823425 ,  H01L21/823475 ,  H01L23/5226 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/66795 ,  H01L21/28518 ,  H01L29/785

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

公开(公告)号：US10535748B2

公开(公告)日：2020-01-14

申请号：US15909838

申请日：2018-03-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wen Cheng ,  Cheng-Tung Lin ,  Chih-Wei Chang ,  Hong-Mao Lee ,  Ming-Hsing Tsai ,  Sheng-Hsuan Lin ,  Wei-Jung Lin ,  Yan-Ming Tsai ,  Yu-Shiuan Wang ,  Hung-Hsu Chen ,  Wei-Yip Loh ,  Ya-Yi Cheng

IPC: H01L29/66 ,  H01L29/45 ,  H01L21/768 ,  H01L21/02 ,  H01L21/326 ,  H01L29/78 ,  H01L29/08 ,  H01L21/311 ,  H01L21/306 ,  H01L21/266 ,  H01L21/265 ,  H01L21/3105 ,  H01L21/321

Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.

公开(公告)号：US20240332076A1

公开(公告)日：2024-10-03

申请号：US18738443

申请日：2024-06-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Yip Loh ,  Chih-Wei Chang ,  Hong-Mao Lee ,  Chun-Hsien Huang ,  Yu-Ming Huang ,  Yan-Ming Tsai ,  Yu-Shiuan Wang ,  Hung-Hsu Chen ,  Yu-Kai Chen ,  Yu-Wen Cheng

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/8234 ,  H01L23/522 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/76856 ,  H01L21/76805 ,  H01L21/823425 ,  H01L21/823475 ,  H01L23/5226 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/66795 ,  H01L21/28518 ,  H01L29/785

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

公开(公告)号：US11195791B2

公开(公告)日：2021-12-07

申请号：US16707301

申请日：2019-12-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Wen Cheng ,  Wei-Yip Loh ,  Yu-Hsiang Liao ,  Sheng-Hsuan Lin ,  Hong-Mao Lee ,  Chun-I Tsai ,  Ken-Yu Chang ,  Wei-Jung Lin ,  Chih-Wei Chang ,  Ming-Hsing Tsai

IPC: H01L21/768 ,  H01L23/522 ,  H01L29/66 ,  H01L21/285 ,  H01L21/8238 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48

Abstract: A method for forming a semiconductor contact structure is provided. The method includes depositing a dielectric layer over a substrate. The method also includes etching the dielectric layer to expose a sidewall of the dielectric layer and a top surface of the substrate. In addition, the method includes forming a silicide region in the substrate. The method also includes applying a plasma treatment to the sidewall of the dielectric layer and the top surface of the substrate to form a nitridation region adjacent to a periphery of the silicide region. The method further includes depositing an adhesion layer on the dielectric layer and the silicide region.

公开(公告)号：US20200152763A1

公开(公告)日：2020-05-14

申请号：US16740881

申请日：2020-01-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wen Cheng ,  Cheng-Tung Lin ,  Chih-Wei Chang ,  Hong-Mao Lee ,  Ming-Hsing Tsai ,  Sheng-Hsuan Lin ,  Wei-Jung Lin ,  Yan-Ming Tsai ,  Yu-Shiuan Wang ,  Hung-Hsu Chen ,  Wei-Yip Loh ,  Ya-Yi Cheng

IPC: H01L29/66 ,  H01L29/08 ,  H01L21/768 ,  H01L29/78 ,  H01L21/02 ,  H01L21/326 ,  H01L29/45

Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.