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公开(公告)号:US11587863B2
公开(公告)日:2023-02-21
申请号:US17116926
申请日:2020-12-09
Inventor: Chih-Kuang Kao , Ta-Chih Peng , Ming-Hong Kao , Huei-Wen Yang
IPC: H01L23/48 , H01L23/52 , H01L23/522 , H01L25/065 , H01L23/00 , H01L49/02 , H01L21/02
Abstract: The present disclosure provides a semiconductor structure, including a capacitor. The capacitor includes a first electrode and a second electrode respectively electrically connected to a first conductor and a second conductor; and a first dielectric layer between the first electrode and the second electrode. In some embodiments, the first dielectric layer contacts with a sidewall surface of the first conductor. The semiconductor structure further includes a second dielectric layer over and adjacent to the capacitor. A method of forming the semiconductor package is also provided.
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公开(公告)号:US11978764B2
公开(公告)日:2024-05-07
申请号:US17837909
申请日:2022-06-10
Inventor: Chih-Kuang Kao
IPC: H01L23/522 , H01L23/532 , H01L49/02
CPC classification number: H01L28/60 , H01L23/5222 , H01L23/5226 , H01L23/5329
Abstract: A capacitor structure includes a first electrode, a second electrode, a third electrode, a first dielectric layer and a second dielectric layer. The second electrode is disposed over the first electrode. The third electrode is disposed over the second electrode. The first dielectric layer is disposed between the first electrode and the second electrode. The second dielectric layer is disposed between the second electrode and the third electrode. The third electrode contacts the first electrode. A semiconductor structure thereof and a method for forming the same are also provided.
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公开(公告)号:US12125782B2
公开(公告)日:2024-10-22
申请号:US18171311
申请日:2023-02-17
Inventor: Chih-Kuang Kao , Ta-Chih Peng , Ming-Hong Kao , Huei-Wen Yang
IPC: H01L23/48 , H01L21/02 , H01L23/00 , H01L23/52 , H01L23/522 , H01L25/065 , H01L49/02
CPC classification number: H01L23/5223 , H01L21/02532 , H01L21/0254 , H01L21/02554 , H01L24/17 , H01L25/0657 , H01L28/60
Abstract: The present disclosure provides a semiconductor structure, including a capacitor. The capacitor includes a first electrode and a second electrode respectively electrically connected to a first conductor and a second conductor; and a first dielectric layer between the first electrode and the second electrode. In some embodiments, the first dielectric layer contacts with a sidewall surface of the first conductor. The semiconductor structure further includes a second dielectric layer over and adjacent to the capacitor. A method of forming the semiconductor package is also provided.
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公开(公告)号:US10763325B2
公开(公告)日:2020-09-01
申请号:US16114917
申请日:2018-08-28
Inventor: Chih-Kuang Kao
IPC: H01L49/02 , H01L23/522 , H01L23/532
Abstract: A capacitor structure includes an insulative layer, a first electrode over the insulative layer, a dielectric layer over the first electrode, and a second electrode over the dielectric layer. The first electrode includes a first portion extending along a lateral direction of the insulative layer and a second portion connected to the first portion and extending along a depth direction of the insulative layer. The dielectric layer is substantially conformal with respect to a profile of the first electrode. A semiconductor structure thereof and a method for forming the same are also provided.
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公开(公告)号:US20240038605A1
公开(公告)日:2024-02-01
申请号:US18308982
申请日:2023-04-28
Inventor: Yu-Ching Chiu , Chih-Kuang Kao , Huei-Wen Yang
IPC: H01L21/66
CPC classification number: H01L22/32 , H01L22/14 , H01L29/775
Abstract: A testline structure of a semiconductor device includes a substrate layer, a frontside insulating layer atop the substrate layer, a backside insulating layer under the substrate layer, and a probe pad structure vertically extending through the frontside insulating layer, the substrate layer, and the backside insulating layer. The probe pad structure includes a frontside probe pad in the frontside insulating layer and a backside probe pad in the backside insulating layer.
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公开(公告)号:US20240038486A1
公开(公告)日:2024-02-01
申请号:US18298031
申请日:2023-04-10
Inventor: Yu-Ching Chiu , Chih-Kuang Kao , Huei-Wen Yang
IPC: H01J37/248 , H01J37/305 , H01J37/30 , H01J37/28
CPC classification number: H01J37/248 , H01J37/305 , H01J37/3005 , H01J37/28 , H01J2237/206 , H01J2237/31749 , H01J2237/2802 , H01J2237/20207 , H01J2237/20214 , H01J2237/024
Abstract: An apparatus for observing a sample using a charged particle beam includes an ion beam column configured to generate and direct an ion beam, an electron beam column configured to generate and direct an electron beam, a vacuum chamber for housing the sample, and a probe positioned in the vacuum chamber. The probe is configured to provide electrical connection between the sample and a power supply.
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公开(公告)号:US11362169B2
公开(公告)日:2022-06-14
申请号:US17008200
申请日:2020-08-31
Inventor: Chih-Kuang Kao
IPC: H01L49/02 , H01L23/522 , H01L23/532
Abstract: A capacitor structure includes an insulative layer, a first electrode over the insulative layer, a dielectric layer over the first electrode, and a second electrode over the dielectric layer. The first electrode includes a first portion extending along a lateral direction of the insulative layer and a second portion connected to the first portion and extending along a depth direction of the insulative layer. The dielectric layer is substantially conformal with respect to a profile of the first electrode. A semiconductor structure thereof and a method for forming the same are also provided.
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公开(公告)号:US09112004B2
公开(公告)日:2015-08-18
申请号:US14132651
申请日:2013-12-18
Inventor: Chih-Kuang Kao , Huei-Wen Yang , Yung-Sheng Huang , Yu-Wen Lin
IPC: H01L21/768 , H01L23/532
CPC classification number: H01L21/76864 , H01L21/76831 , H01L21/76843 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: A copper interconnect includes a copper layer formed in a dielectric layer. A glue layer is formed between the copper layer and the dielectric layer. A barrier layer is formed at the boundary between the glue layer and the dielectric layer. The barrier layer is a metal oxide.
Abstract translation: 铜互连包括在电介质层中形成的铜层。 在铜层和电介质层之间形成胶层。 在胶层和电介质层之间的边界处形成阻挡层。 阻挡层是金属氧化物。
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公开(公告)号:US20140106562A1
公开(公告)日:2014-04-17
申请号:US14132651
申请日:2013-12-18
Inventor: Chih-Kuang Kao , Huei-Wen Yang , Yung-Sheng Huang , Yu-Wen Lin
IPC: H01L21/768
CPC classification number: H01L21/76864 , H01L21/76831 , H01L21/76843 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: A copper interconnect includes a copper layer formed in a dielectric layer. A glue layer is formed between the copper layer and the dielectric layer. A barrier layer is formed at the boundary between the glue layer and the dielectric layer. The barrier layer is a metal oxide.
Abstract translation: 铜互连包括在电介质层中形成的铜层。 在铜层和电介质层之间形成胶层。 在胶层和电介质层之间的边界处形成阻挡层。 阻挡层是金属氧化物。
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