公开(公告)号：US20240099030A1

公开(公告)日：2024-03-21

申请号：US18303641

申请日：2023-04-20

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Kuan-Yu Huang ,  Sung-Hui Huang ,  Kuo-Chiang Ting ,  Chia-Hao Hsu ,  Hsien-Pin Hsu ,  Chih-Ta Shen ,  Shang-Yun Hou

IPC分类号： H10B80/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065

CPC分类号： H10B80/00 ,  H01L23/31 ,  H01L23/5383 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2225/06555

摘要： A bonded assembly includes an interposer; a semiconductor die that is attached to the interposer and including a planar horizontal bottom surface and a contoured sidewall; a high bandwidth memory (HBM) die that is attached to the interposer; and a dielectric material portion contacting the semiconductor die and the interposer. The contoured sidewall includes a vertical sidewall segment and a non-horizontal, non-vertical surface segment that is adjoined to a bottom edge of the vertical sidewall segment and is adjoined to an edge of the planar horizontal bottom surface of the semiconductor die. The vertical sidewall segment and the non-horizontal, non-vertical surface segment are in contact with the dielectric material portion. The contoured sidewall may provide a variable lateral spacing from the HBM die to reduce local stress in a portion of the HBM die that is proximal to the interposer.

公开(公告)号：US20240321759A1

公开(公告)日：2024-09-26

申请号：US18344900

申请日：2023-06-30

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Tsung-Ding Wang ,  Chien-Hsun Lee ,  Shang-Yun Hou ,  Hao-Cheng Hou ,  Chin-Liang Chen

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10

CPC分类号： H01L23/5386 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/563 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5381 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/105 ,  H01L23/3675 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/1427 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/3511

摘要： A package structure includes an interposer including a front side and a back side opposite the front side, an upper molded structure on the front side of the interposer and including an upper molding layer and a semiconductor die in the upper molding layer, and a lower molded structure on the back side of the interposer and including a lower molding layer and a substrate portion in the lower molding layer, wherein the substrate portion includes conductive layers electrically coupled to the semiconductor die through the interposer.

公开(公告)号：US12124078B2

公开(公告)日：2024-10-22

申请号：US17548660

申请日：2021-12-13

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Kuan-Yu Huang ,  Yu-Yun Huang ,  Tien-Yu Huang ,  Sung-Hui Huang ,  Sen-Bor Jan ,  Shang-Yun Hou

IPC分类号： G02B6/12 ,  G02B6/124 ,  G02B6/13

CPC分类号： G02B6/12002 ,  G02B6/124 ,  G02B6/13

摘要： A package assembly includes a package substrate including a first die that includes a photonic integrated circuit, a second die located on the first die, the second die including an electronic integrated circuit electrically connected to the photonic integrated circuit, and an interposer module on the package substrate, at least a portion of the interposer module being located on the first die and electrically connected to the photonic integrated circuit.