公开(公告)号：US11824032B2

公开(公告)日：2023-11-21

申请号：US17205669

申请日：2021-03-18

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Wei-Yu Chen ,  Chi-Yang Yu ,  Kuan-Lin Ho ,  Chin-Liang Chen ,  Yu-Min Liang ,  Jiun Yi Wu

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56

CPC分类号： H01L24/20 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3185 ,  H01L23/3192 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L24/14 ,  H01L2224/13 ,  H01L2224/13024 ,  H01L2224/14131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/2101 ,  H01L2224/221 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73209 ,  H01L2224/73217 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/1431 ,  H01L2924/1437

摘要： A chip package structure includes a fan-out package containing at least one semiconductor die, an epoxy molding compound (EMC) die frame laterally surrounding the at least one semiconductor die, and a redistribution structure. The fan-out package has chamfer regions at which horizontal surfaces and vertical surfaces of the fan-out package are connected via angled surfaces that are not horizontal and not vertical. The chip package structure may include a package substrate that is attached to the fan-out package via an array of solder material portions, and an underfill material portion that laterally surrounds the array of solder material portions and contacts an entirety of the angled surfaces. The angled surfaces eliminate a sharp corner at which mechanical stress may be concentrated, and distribute local mechanical stress in the chamfer regions over a wide region to prevent cracks in the underfill material portion.

公开(公告)号：US20240321759A1

公开(公告)日：2024-09-26

申请号：US18344900

申请日：2023-06-30

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Tsung-Ding Wang ,  Chien-Hsun Lee ,  Shang-Yun Hou ,  Hao-Cheng Hou ,  Chin-Liang Chen

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10

CPC分类号： H01L23/5386 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/563 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5381 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/105 ,  H01L23/3675 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/1427 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/3511

摘要： A package structure includes an interposer including a front side and a back side opposite the front side, an upper molded structure on the front side of the interposer and including an upper molding layer and a semiconductor die in the upper molding layer, and a lower molded structure on the back side of the interposer and including a lower molding layer and a substrate portion in the lower molding layer, wherein the substrate portion includes conductive layers electrically coupled to the semiconductor die through the interposer.