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    Semiconductor device and a method of manufacturing the same
    1.
    发明授权
    Semiconductor device and a method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06667193B2

    公开(公告)日：2003-12-23

    申请号：US10108439

    申请日：2002-03-29

    申请人： Takao Matsuura ,  Yoshihiko Yamaguchi ,  Shouichi Kobayashi ,  Kouji Tsuchiya

    发明人： Takao Matsuura ,  Yoshihiko Yamaguchi ,  Shouichi Kobayashi ,  Kouji Tsuchiya

    IPC分类号： H01L2144

    CPC分类号： H01L23/3107 ,  H01L21/4835 ,  H01L21/4842 ,  H01L21/565 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

    摘要： To improve the connection reliability at the time of packaging a semiconductor device and to make the method management easy in a semiconductor device manufacturing method. The semiconductor device comprises: a tub 1e for supporting a semiconductor chip 2; a sealing body 3 formed by sealing the semiconductor chip 2 with a resin; a plurality of leads 1a made of a copper alloy, exposed to the back face 3a of the sealing body 3, and having a soldered layer 8 on the exposed mounted face 1d; and wires 4 for connecting the pads 2a of the semiconductor chip 2 and the corresponding leads 1a. In the manufacture method, the sealing body 3 is polished, after resin-molded, at its back face 3a with a brush to form the two widthwise edge portions, as exposed from the back face 3a of the sealing body 3, of the lead la into rounded faces, and the mounted face 1d of the lead la including the rounded faces is protruded at its central portion from the back face 3a of the sealing body 3 thereby to improve the connection reliability at the packaging time.

    摘要翻译： 为了提高封装半导体器件时的连接可靠性，并且在半导体器件制造方法中使得方法管理变得容易。半导体器件包括：用于支撑半导体芯片2的桶1e; 通过用树脂密封半导体芯片2形成的密封体3; 多个由铜合金制成的引线1a，暴露于密封体3的背面3a，并且在暴露的安装面1d上具有焊接层8; 以及用于连接半导体芯片2的焊盘2a和相应引线1a的导线4。 在制造方法中，密封体3在树脂模制后用刷子在其背面3a处被抛光，以形成从密封体3的背面3a露出的两个横向边缘部分的引线1a 并且包括圆形面的引线1a的安装面1d在其中心部分处从密封体3的背面3a突出，从而提高包装时的连接可靠性。

    Transmission power control method and apparatus, and communication apparatus
    5.
    发明授权
    Transmission power control method and apparatus, and communication apparatus 失效
    发射功率控制方法及装置及通信装置

    公开(公告)号：US06885850B2

    公开(公告)日：2005-04-26

    申请号：US09985742

    申请日：2001-11-06

    申请人： Shouichi Kobayashi ,  Hiroki Shinde

    发明人： Shouichi Kobayashi ,  Hiroki Shinde

    IPC分类号： H04J13/00 ,  H04B1/04 ,  H04B7/005

    CPC分类号： H04W52/52

    摘要： A transmission power control apparatus for outputting a transmission data to be filtered by a band-limiting filter (9), includes: a branching unit (81) for branching transmission data before being entered into the band-limiting filter (9); a peak detecting filter (84) having the same structure as that of the band-limiting filter (9), for entering thereinto one of the transmission data branched by this branching unit (81); units (85 to 89) for calculating a correction value capable of suppressing a power peak of the transmission data by being filtered by this peak detecting filter (84); a delaying unit for delaying the other data of the branched transmission data by time required to calculate the correction value; and a correcting unit (83) for correcting the transmission data delayed by this delaying unit (82) based upon the correction value, and thereafter, for entering the corrected transmission data into the band-limiting filter (9).

    摘要翻译： 一种用于输出由带限滤波器（9）滤波的发送数据的发送功率控制装置，包括：分支单元（81），用于在输入到所述限带滤波器（9）之前分支发送数据; 具有与带限滤波器（9）相同结构的峰值检测滤波器（84），用于输入由该分支单元（81）分支的一个传输数据; 单元（85〜89），用于计算能够通过由该峰值检测滤波器（84）滤波来抑制发送数据的功率峰值的校正值; 延迟单元，用于通过计算校正值所需的时间来延迟分支发送数据的其他数据; 以及校正单元（83），用于基于校正值来校正由该延迟单元（82）延迟的发送数据，然后用于将校正后的发送数据输入到带限滤波器（9）中。

    Semiconductor package having electrode on side surface, and semiconductor device
    6.
    发明授权
    Semiconductor package having electrode on side surface, and semiconductor device 失效
    具有侧面电极的半导体封装以及半导体器件

    公开(公告)号：US08659138B2

    公开(公告)日：2014-02-25

    申请号：US13600971

    申请日：2012-08-31

    申请人： Shouichi Kobayashi ,  Hiroyuki Tanaka

    发明人： Shouichi Kobayashi ,  Hiroyuki Tanaka

    IPC分类号： H01L23/48

    CPC分类号： H01L23/49805 ,  H01L23/057 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A semiconductor package includes a substrate, a semiconductor chip disposed on the substrate, and a connection wiring connected electrically to the semiconductor chip. The semiconductor package further includes a sidewall formed of an insulator, an inner electrode formed on a first surface of the sidewall that faces the substrate, and a sidewall external electrode formed on a second surface of the sidewall different from the first surface. The inner electrode and the sidewall external electrode are connected electrically, and the inner electrode is connected to the connection wiring. With this configuration, it is possible to suppress the semiconductor package from being large due to an increase in the number of sidewall external electrodes formed on the side surfaces of the semiconductor package, and to shorten a connection distance between the semiconductor packages by connecting the sidewall external electrodes.

    摘要翻译： 半导体封装包括基板，设置在基板上的半导体芯片以及与半导体芯片电连接的连接布线。 半导体封装还包括由绝缘体形成的侧壁，形成在侧壁的面向基板的第一表面上的内部电极，以及形成在不同于第一表面的侧壁的第二表面上的侧壁外部电极。 内部电极和侧壁外部电极电连接，内部电极连接到连接配线。 利用这种结构，可以通过形成在半导体封装的侧表面上的侧壁外部电极的数量的增加来抑制半导体封装的大量化，并且通过将侧壁连接来缩短半导体封装之间的连接距离 外部电极。

    Limiting method and limiter apparatus
    7.
    发明授权
    Limiting method and limiter apparatus 失效
    限制方法和限制器

    公开(公告)号：US06819721B1

    公开(公告)日：2004-11-16

    申请号：US09650595

    申请日：2000-08-30

    申请人： Shouichi Kobayashi ,  Hiroki Shinde

    发明人： Shouichi Kobayashi ,  Hiroki Shinde

    IPC分类号： H04L2736

    CPC分类号： H03G3/3036 ,  H03G11/00

    摘要： A limiting method is provided which limits signals having two components I channel and Q channel on two orthogonal coordinate axes within a predetermined range on the coordinate plane specified by the two coordinate axes, wherein the predetermined range is defined by concentric circles having the origin of the two coordinate axes as a center.

    摘要翻译： 提供限制方法，其限制在由两个坐标轴指定的坐标平面上的预定范围内的两个正交坐标轴上具有两个分量I通道和Q通道的信号，其中预定范围由具有 两个坐标轴为中心。