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公开(公告)号：US5046042A
公开(公告)日：1991-09-03
申请号：US846925
申请日：1986-03-24
CPC分类号： G06F3/0601 , G06F5/06 , G06F2003/0692
摘要： A data processing system processes digital information representing, for example, an image and supplied at a lower transfer rate from a data source such as an optical disc unit, to produce data in such a form as to be efficiently used by a device of a higher transfer rate such as a CRT display unit. The digital information includes a plurality of groups of data each representing, for example, a portion or a window of the image and added with control data for defining characteristics thereof. While the digital information is read out at a constant entire transfer rate, the plurality of groups of data are transferred at respective transfer rates which vary with a lapse of time. The control data of each group of data is separated therefrom, and the group of data and the separated control data are stored into first and second memories. The groups of data stored in the first memory are processed in accordance with the results of analysis of the control data stored in the second memory to form data in such a form as to be efficiently used by the device of the higher transfer rate.
摘要翻译： 数据处理系统处理表示例如图像的数字信息，并从诸如光盘单元的数据源以较低的传输速率提供，以产生数据，以便由更高级的设备有效地使用 传输速率如CRT显示单元。 数字信息包括多个数据组，每组表示例如图像的一部分或窗口，并且添加有用于定义其特征的控制数据。 当以恒定的整个传送速率读出数字信息时，以随时间流逝变化的各个传送速率传送多组数据。 每组数据的控制数据被分离，数据组和分离的控制数据被存储到第一和第二存储器中。 存储在第一存储器中的数据组根据存储在第二存储器中的控制数据的分析结果进行处理，以形成数据，以便由较高传送速率的设备有效地使用。
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公开(公告)号：US4864289A
公开(公告)日：1989-09-05
申请号：US9095
申请日：1987-01-23
摘要： A video display control system displays a multicolor animation pattern on a screen of a video display unit. The video display control system is mainly constructed by a video RAM (VRAM) and a video display processor (VDP). The VRAM stores animation pattern data, display position data and at least two color data. The VDP reads these data and makes an animation pattern image displayed in at least two colors at a display position on the screen. The animation pattern image, two colors and display position are determined by the animation pattern data, two color data and display position data. In another video display control system, the VRAM stores at least two sets of animation pattern data, display position data and color data. When displaying two animation patterns, the VDP effects a logical operation on the two color data with respect to the overlapping portion of the two patterns and makes the overlapping portion displayed in a new color corresponding to the operation result. When the animation patterns overlaps, the VDP can also deliver a collision signal in place of the logical operation, thereby enabling a CPU to recognize the position of the overlapping portion.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示多色动画图案。 视频显示控制系统主要由视频RAM（VRAM）和视频显示处理器（VDP）构成。 VRAM存储动画图案数据，显示位置数据和至少两个颜色数据。 VDP读取这些数据，并使屏幕上的显示位置以至少两种颜色显示动画图案图像。 动画图案图像，两种颜色和显示位置由动画图案数据，两种颜色数据和显示位置数据确定。 在另一个视频显示控制系统中，VRAM存储至少两组动画图案数据，显示位置数据和颜色数据。 当显示两个动画图案时，VDP相对于两个图案的重叠部分对两个颜色数据进行逻辑运算，并使得重叠部分以对应于操作结果的新颜色显示。 当动画图案重叠时，VDP也可以传递碰撞信号代替逻辑操作，从而使CPU能够识别重叠部分的位置。
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公开(公告)号：US4737772A
公开(公告)日：1988-04-12
申请号：US739036
申请日：1985-05-29
摘要： A video display processor (VDP) produces a video signal by which a black and white image of an increased gradation can be displayed on a video display unit. The VDP reads from a video RAM (VRAM) either color codes each representative of a color of each display element, or amplitude data representative of amplitudes of a video signal to be reproduced. When displaying an image based on the color codes, the color codes are converted by a color palette circuit into color data each composed of three primary color data, and then supplied to a digital color encoder. The digital color encoder multiplies each of the three color data by predetermined coefficients at proper phase timings to output data representative of three chrominance signals. This output data is summed by an adder circuit and then converted into an analog signal to be supplied to the video display unit as the video signal. When displaying an image based on the amplitude data, the color palette circuit converts the amplitude data into gradation data. The digital color encoder multiplies the gradation data by other proper coefficients so that data proportional in value to the gradation data are obtained at the output of the adder circuit. This data is converted into an analog signal to thereby reproduce the video signal.
摘要翻译： 视频显示处理器（VDP）产生视频信号，通过该视频信号可以在视频显示单元上显示增加灰度的黑白图像。 VDP从视频RAM（VRAM）读取每个代表每个显示元件的颜色的颜色代码，或表示要再现的视频信号的幅度的幅度数据。 当基于颜色代码显示图像时，颜色代码由调色板电路转换成每个由三个基色数据组成的颜色数据，然后提供给数字颜色编码器。 数字彩色编码器以适当的相位定时将三个颜色数据中的每一个乘以预定系数，以输出表示三个色度信号的数据。 该输出数据由加法器电路求和，然后转换为模拟信号，以供应给视频显示单元作为视频信号。 当基于幅度数据显示图像时，调色板电路将振幅数据转换为灰度数据。 数字彩色编码器将灰度数据乘以其他适当的系数，使得在加法器电路的输出处获得与灰度数据成比例的数据。 该数据被转换成模拟信号从而再现视频信号。
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公开(公告)号：US4628467A
公开(公告)日：1986-12-09
申请号：US735370
申请日：1985-05-17
申请人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
发明人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
摘要： A video display control system comprises a video display processor (VDP) which is capable of accessing to a video RAM (VRAM) at an extremely high-speed. The VRAM used in this system comprises first and second dynamic RAMs each having an address input terminal to which row address data and column address data are supplied, a row address strobe input terminal, a column address strobe input terminal, and a data input/output terminal. The row address data is latched at the leading edge of a row address strobe signal applied to the row address strobe input terminal, while the column address data is latched at the leading edge of a column address strobe signal applied to the column address strobe input terminal. An access to an address of each dynamic RAM is established when both of the row and column address data are latched. The VDP comprises a VRAM interface for controlling an access to the first and second dynamic RAMs which is connected to the RAMs through a common address bus. The VRAM interface first outputs row address data together with a row address strobe signal RAS and then outputs column address data together with two column address strobe signals CAS0 and CAS1 which are rendered active in sequence and supplied to the first and second dynamic RAMs, respectively.
摘要翻译： 视频显示控制系统包括能够以极高速度访问视频RAM（VRAM）的视频显示处理器（VDP）。 该系统中使用的VRAM包括第一和第二动态RAM，每个具有地址输入端，行地址数据和列地址数据被提供给地址输入端，行地址选通输入端，列地址选通输入端和数据输入/输出 终奌站。 行地址数据被锁存在施加到行地址选通输入端的行地址选通信号的前沿，而列地址数据被锁存在施加到列地址选通输入端的列地址选通信号的前沿 。 当锁存行和列地址数据时，建立对每个动态RAM的地址的访问。 VDP包括用于控制通过公共地址总线连接到RAM的第一和第二动态RAM的访问的VRAM接口。 VRAM接口首先将行地址数据与行地址选通信号和上拉和下拉一起输出，然后将列地址数据与两个列地址选通信号和上拉和C和＆amp;上拉和C依次输出并提供给第一和第二动态RAM ， 分别。
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公开(公告)号：US4804948A
公开(公告)日：1989-02-14
申请号：US77984
申请日：1987-07-27
CPC分类号： G09G5/026
摘要： A video display control system displays a video image composed of a plurality of display elements on a screen of a video display unit. The system comprises a memory (VRAM) for storing a plurality of color codes each representing at least one display element and a video display controller (VDP). The VDP comprises a mode register for selecting one of normal display and transparency processing modes, display processing circuit for reading the color codes from the VRAM, a backdrop color register for storing a color code such as one representing a backdrop color, a detection circuit for detecting a predetermined color code from the color codes read by the display processing circuit, and a selector controlled by an output of the detection circuit. In the normal display mode, the selector outputs all color codes read by the display processing circuit to the display unit. In the transparency processing mode, the selector outputs the color codes read by the display processing circuit to the display unit when the predetermined color code is not detected, and outputs the color code contained in the backdrop color register to the display unit when the predetermined color code is detected. The VDP further comprises another detection circuit for detecting a second predetermined color code from the color codes outputted from the selector to output a control signal. And if the second predetermined color code is detected in the transparency processing mode, the display unit displays an image in accordance with an external video signal.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示由多个显示元件组成的视频图像。 该系统包括用于存储代表至少一个显示元件和视频显示控制器（VDP）的多个颜色代码的存储器（VRAM）。 VDP包括用于选择正常显示和透明度处理模式之一的模式寄存器，用于从VRAM读取颜色代码的显示处理电路，用于存储诸如表示背景颜色的颜色代码的颜色代码的背景颜色寄存器，用于 从由显示处理电路读取的颜色代码检测预定的颜色代码，以及由检测电路的输出控制的选择器。 在正常显示模式下，选择器将由显示处理电路读出的所有颜色代码输出到显示单元。 在透明度处理模式中，当未检测到预定颜色代码时，选择器将由显示处理电路读取的颜色代码输出到显示单元，并且当预定颜色在显示单元中输出包含在背景颜色寄存器中的颜色代码 检测到代码。 VDP还包括用于从从选择器输出的颜色代码中检测第二预定颜色代码以输出控制信号的另一个检测电路。 并且如果在透明度处理模式中检测到第二预定颜色代码，则显示单元根据外部视频信号显示图像。
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公开(公告)号：US4660070A
公开(公告)日：1987-04-21
申请号：US736828
申请日：1985-05-22
摘要： A video display processor (VDP) for use with a central processing unit, a video RAM (VRAM) and a video display unit is capable of writing video image data supplied from an external video device such as a television set into the VRAM. The VDP comprises a first input terminal for receiving the external video image data and a second input terminal for receiving horizontal and vertical synchronization signals from the external video device. The VDP generates address data in accordance with the horizontal and vertical synchronization signals and supplies the address data to the VRAM when processing of the external video image data is designated. The VDP also supplies the received external video image data to the VRAM thereby to write the external video image data into addresses of the VRAM designated by the address data. The external video image data may be either color codes representative of colors of display elements of a video image displayed at the external video device or data representative of amplitude levels of an analog video signal outputted from the external video device.
摘要翻译： 与中央处理单元，视频RAM（VRAM）和视频显示单元一起使用的视频显示处理器（VDP）能够将从诸如电视机的外部视频设备提供的视频图像数据写入到VRAM中。 VDP包括用于接收外部视频图像数据的第一输入端子和用于从外部视频装置接收水平和垂直同步信号的第二输入端子。 VDP根据水平和垂直同步信号产生地址数据，并且在指定外部视频图像数据的处理时将地址数据提供给VRAM。 VDP还将接收到的外部视频图像数据提供给VRAM，从而将外部视频图像数据写入由地址数据指定的VRAM的地址。 外部视频图像数据可以是表示在外部视频设备上显示的视频图像的显示元素的颜色的颜色代码或表示从外部视频设备输出的模拟视频信号的幅度电平的数据。
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公开(公告)号：US4426902A
公开(公告)日：1984-01-24
申请号：US347185
申请日：1982-02-09
摘要： A key-speed-responsive volume control apparatus for a keyboard-type electronic musical instrument includes a key switch associated with a key of the instrument, wherein a movable contact of the key switch moves out of engagement with a break contact and into engagement with a make contact upon depression of the key. A capacitor is charged following the movement of the movable contact out of engagement with the break contact and before engagement with the make contact. The capacitor is made to discharge at a first prescribed rate immediately after charging until the movable contact comes into engagement with the make contact, and then at a second prescribed rate until the movable contact disengages the make contact upon release of the key. The terminal voltage of the capacitor when the movable contact comes into engagement with the make contact is utilized for controlling the amplitude of a tone source signal corresponding to the depressed key, thereby providing a tone signal having an initial amplitude determined in accordance with the speed of key depression. Necessitating the use of only one capacitor for each key, the apparatus is suitable for fabrication in the form of an integrated circuit.
摘要翻译： 一种用于键盘型电子乐器的按键速度响应音量控制装置包括与该乐器的键相关联的键开关，其中键开关的可动触点与断开触点脱离接合并与 在按住钥匙时接触。 随着可动触点的移动与断开触点的接合以及在与触点接合之前，电容器被充电。 电容器在充电之后立即以第一规定速率放电直到可动触点与制动触点接合，然后以第二规定速率直到可释放触点在释放键时脱离接触。 当可动触头与制动触点接合时，电容器的端子电压被用于控制与按下的键对应的音源信号的振幅，从而提供具有根据按键的速度确定的初始振幅的音调信号 关键抑郁症 每个键只需要使用一个电容器，该装置适合以集成电路的形式制造。
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公开(公告)号：US4897636A
公开(公告)日：1990-01-30
申请号：US139170
申请日：1987-12-21
申请人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
发明人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
摘要： A video display control system is capable of moving a part of a still image from a first display area to a second display area on a screen. The video display control system includes a memory composed of a plurality of memory locations for storing a plurality of display data representative of images of display elements on the screen. First and second registers retain first and second area data representative of the first and second display areas, and an address data generator generates from these area data first and second address data, the first address data indicating memory locations which store display data corresponding to the first display area, the second address data indicating second memory locations which store display data corresponding to the second display area. A reading circuit reads the display data in the first memory locations in accordance with the first address data, while a writing circuit writes the read display data into the second memory locations in accordance with the second address data. This video display control system further includes another reading circuit and an operation circuit. This reading circuit reads the display data in the second memory locations and feeds the read display data to the operation circuit which effects an operation such as a logical operation or a transparency processing on each pair of the display data read from the first and second memory locations.
摘要翻译： 视频显示控制系统能够将静止图像的一部分从第一显示区域移动到屏幕上的第二显示区域。 视频显示控制系统包括由多个存储位置组成的存储器，用于存储表示屏幕上显示元素的图像的多个显示数据。 第一和第二寄存器保持表示第一和第二显示区域的第一和第二区域数据，并且地址数据生成器从这些区域数据生成第一和第二地址数据，第一地址数据指示存储对应于第一和第二显示区域的显示数据的存储单元 显示区域，第二地址数据指示存储对应于第二显示区域的显示数据的第二存储单元。 读取电路根据第一地址数据读取第一存储器位置中的显示数据，而写入电路根据第二地址数据将读取的显示数据写入第二存储器位置。 该视频显示控制系统还包括另一读取电路和操作电路。 该读取电路读取第二存储器位置中的显示数据并将读取的显示数据馈送到对从第一和第二存储器位置读取的每对显示数据执行诸如逻辑操作或透明度处理的操作的操作电路 。
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公开(公告)号：US4731742A
公开(公告)日：1988-03-15
申请号：US712253
申请日：1985-03-15
申请人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
发明人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
摘要： A video display control system for displaying a video image on a screen of a video display unit. This video display control system basically comprises a VRAM (video RAM) and a video display processor (VDP). The VRAM has memory locations corresponding to display elements on the screen. The VDP includes a first register for receiving area information identifying a display area on the screen, an address generator for generating addresses of memory locations corresponding to the display area in accordance with the area information, and a memory accessing circuit for accessing the memory locations having the addresses. Therefore, the memory accessing operation through this VDP does not need a complicated support by a central processing unit. The VDP further comprises a second register for storing a color code supplied from an external device or read from the VRAM. Through this second register, the memory accessing circuit performs a memory accessing operation such as a transfer of color code between the external device and the VRAM, whereby color painting on a display area such as a rectangular area, dot and a line can easily be achieved. The VDP further comprises an operation circuit for effecting a certain operation on a color code in the second register and a color code in the VRAM and generating a new color code in accordance with the operation result. The operation-related color change on a display area can be achieved by storing the new color code in a corresponding memory location of the VRAM.
摘要翻译： 一种用于在视频显示单元的屏幕上显示视频图像的视频显示控制系统。 该视频显示控制系统基本上包括VRAM（视频RAM）和视频显示处理器（VDP）。 VRAM具有与屏幕上的显示元素相对应的存储器位置。 VDP包括用于接收区域信息的第一寄存器，用于识别屏幕上的显示区域;地址发生器，用于根据区域信息产生对应于显示区域的存储位置的地址;以及存储器访问电路，用于访问具有 地址。 因此，通过该VDP的存储器访问操作不需要中央处理单元的复杂支持。 VDP还包括用于存储从外部设备提供或从VRAM读取的颜色代码的第二寄存器。 通过该第二寄存器，存储器访问电路执行存储器访问操作，例如外部设备和VRAM之间的颜色代码的传送，由此可以容易地实现诸如矩形区域，点和行的显示区域上的彩色绘画 。 VDP还包括用于对第二寄存器中的颜色代码进行某种操作的操作电路和VRAM中的颜色代码，并根据操作结果生成新的颜色代码。 可以通过将新的颜色代码存储在VRAM的对应的存储器位置中来实现显示区域上的与操作相关的颜色变化。
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公开(公告)号：US5416497A
公开(公告)日：1995-05-16
申请号：US943706
申请日：1992-09-11
摘要： A video display control system displays a multicolor animation pattern on a screen of a video display unit. The video display control system is mainly constructed by a video RAM (VRAM) and a video display processor (VDP). The VRAM stores animation pattern data, display position data and at least two color data. The VDP reads these data and makes an animation pattern image displayed in at least two colors at a display position on the screen. The animation pattern image, two colors and display position are determined by the animation pattern data, two color data and display position data. In another video display control system, the VRAM stores at least two sets of animation pattern data, display position data and color data. When displaying two animation patterns, the VDP effects a logical operation on the two color data with respect to the overlapping portion of the two patterns and makes the overlapping portion displayed in a new color corresponding to the operation result. When the animation patterns overlaps, the VDP can also deliver a collision signal in place of the logical operation, thereby enabling a CPU to recognize the position of the overlapping portion.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示多色动画图案。 视频显示控制系统主要由视频RAM（VRAM）和视频显示处理器（VDP）构成。 VRAM存储动画图案数据，显示位置数据和至少两个颜色数据。 VDP读取这些数据，并使屏幕上的显示位置以至少两种颜色显示动画图案图像。 动画图案图像，两种颜色和显示位置由动画图案数据，两种颜色数据和显示位置数据确定。 在另一个视频显示控制系统中，VRAM存储至少两组动画图案数据，显示位置数据和颜色数据。 当显示两个动画图案时，VDP相对于两个图案的重叠部分对两个颜色数据进行逻辑运算，并使得重叠部分以对应于操作结果的新颜色显示。 当动画图案重叠时，VDP也可以传递碰撞信号代替逻辑操作，从而使CPU能够识别重叠部分的位置。
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