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    Semiconductor device having internal wire and method of fabricating the same
    1.
    发明授权
    Semiconductor device having internal wire and method of fabricating the same 失效
    具有内部电线的半导体器件及其制造方法

    公开(公告)号：US5550409A

    公开(公告)日：1996-08-27

    申请号：US339662

    申请日：1994-11-14

    申请人： Takehisa Yamaguchi ,  Hidekazu Oda

    发明人： Takehisa Yamaguchi ,  Hidekazu Oda

    IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L21/8244 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L27/11 ,  H01L23/48 ,  H01L29/40

    CPC分类号： H01L27/1112 ,  H01L23/53257 ,  H01L27/11 ,  H01L2924/0002

    摘要： In order to obtain a semiconductor device having an internal wire of low resistance, a conductive layer whose surface is silicified is provided in a surface of a semiconductor substrate. A conductor whose surface is silicified is provided on the semiconductor substrate in proximity to the conductive layer. This semiconductor device is provided with an internal wiring layer, which is formed by a titanium film and a titanium silicide layer for electrically connecting the surface of the conductive layer and a surface of an end of the conductor with each other, to cover a side wall surface and a bottom surface of a contact hole.

    摘要翻译： 为了获得具有低电阻的内部线的半导体器件，其表面被硅化的导电层设置在半导体衬底的表面中。 其表面被硅化的导体设置在半导体衬底附近的导电层上。 该半导体器件设置有内部布线层，其由钛膜和钛硅化物层形成，用于将导电层的表面和导体的端部的表面彼此电连接以覆盖侧壁 表面和接触孔的底面。

    Semiconductor MOSFET device having a shallow nitrogen implanted channel region
    2.
    发明授权
    Semiconductor MOSFET device having a shallow nitrogen implanted channel region 失效
    具有浅氮注入沟道区的半导体MOSFET器件

    公开(公告)号：US5557129A

    公开(公告)日：1996-09-17

    申请号：US452611

    申请日：1995-05-25

    申请人： Hidekazu Oda ,  Shuichi Ueno ,  Takehisa Yamaguchi

    发明人： Hidekazu Oda ,  Shuichi Ueno ,  Takehisa Yamaguchi

    IPC分类号： H01L29/78 ,  H01L21/265 ,  H01L21/336 ,  H01L29/10 ,  H01L31/062

    CPC分类号： H01L29/66575 ,  H01L21/26506 ,  H01L29/1033 ,  H01L29/105

    摘要： A boron diffusion region is formed at a surface of a silicon substrate. A pair of n-type source/drain regions are formed at a surface of boron diffusion region. A gate electrode is formed at a region located between paired source/drain regions with a gate insulating film therebetween. A nitrogen implanted region is formed at the surface of silicon substrate located between paired n-type source/drain regions. Nitrogen implanted region has a peak nitrogen concentration at a position of a depth not exceeding 500 .ANG. from the surface of silicon substrate. Thereby, a transistor structure which can be easily miniaturized can be obtained.

    摘要翻译： 在硅衬底的表面上形成硼扩散区。 在硼扩散区的表面形成一对n型源/漏区。 在位于成对的源/漏区之间的区域之间形成有栅极电极，其间具有栅极绝缘膜。 在位于成对的n型源极/漏极区之间的硅衬底的表面处形成氮注入区。 氮注入区域在硅衬底表面的深度不超过500的位置具有峰值氮浓度。 由此，可以获得容易小型化的晶体管结构。

    Method for fabricatins dynamic random access memory device having a capacitor for storing impact ionization charges
    3.
    发明授权
    Method for fabricatins dynamic random access memory device having a capacitor for storing impact ionization charges 失效
    一种用于制造具有用于存储冲击电离电荷的电容器的动态随机存取存储器件的方法

    公开(公告)号：US5270242A

    公开(公告)日：1993-12-14

    申请号：US17903

    申请日：1993-02-16

    申请人： Hidekazu Oda ,  Kiyoteru Kobayashi ,  Takehisa Yamaguchi

    发明人： Hidekazu Oda ,  Kiyoteru Kobayashi ,  Takehisa Yamaguchi

    IPC分类号： H01L27/108 ,  H01L29/786 ,  H01L21/70 ,  H01L27/00

    CPC分类号： H01L27/10805 ,  H01L29/78654

    摘要： Each memory cell of a dynamic random access memory comprises a semiconductor layer of a first conductivity type, one and the other impurity regions of a second conductivity type, a gate electrode, a capacitor impurity region of the first conductivity type, and a capacitor electrode. The semiconductor layer of the first conductivity type comprises a first surface and a second surface located opposite to the first surface. One and the other impurity regions are formed spaced apart from each other in the semiconductor layer so as to define a channel region with a channel surface being a part of the first surface of the semiconductor layer. The gate electrode is formed on the channel surface through a gate insulating film. The capacitor impurity region is formed opposing to the channel region, near the second surface of the semiconductor layer and having a concentration higher than that of the semiconductor layer. The capacitor electrode is formed on the capacitor impurity region through a dielectric film. Reduced surface area occupied by each memory cell comprising a field effect transistor and a capacitor enables miniaturization of the memory cell. Electric charges generated by the impact ionization phenomenon are stored in the capacitor, so that a power consumed in a writing operation of data can be reduced.

    摘要翻译： 动态随机存取存储器的每个存储单元包括第一导电类型的半导体层，第二导电类型的一个和另一个杂质区，第一导电类型的栅电极，电容器杂质区和电容器电极。 第一导电类型的半导体层包括第一表面和与第一表面相对的第二表面。 在半导体层中形成彼此间隔开的一个和其它杂质区，以便限定沟道区，其中沟道表面是半导体层的第一表面的一部分。 栅电极通过栅极绝缘膜形成在沟道表面上。 在半导体层的第二表面附近形成与沟道区相对的电容器杂质区，其浓度高于半导体层的浓度。 电容器电极通过电介质膜形成在电容器杂质区上。 由包括场效应晶体管和电容器的每个存储单元占用的减小的表面积使得能够使存储单元小型化。 由电击现象产生的电荷存储在电容器中，从而可以减少数据写入操作中消耗的功率。

    Semiconductor device and method of manufacturing the same
    4.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06380036B1

    公开(公告)日：2002-04-30

    申请号：US09694003

    申请日：2000-10-23

    申请人： Hidekazu Oda ,  Shuichi Ueno ,  Takehisa Yamaguchi

    发明人： Hidekazu Oda ,  Shuichi Ueno ,  Takehisa Yamaguchi

    IPC分类号： H01L21336

    CPC分类号： H01L21/26506 ,  H01L29/1033 ,  H01L29/105 ,  H01L29/66575

    摘要： A boron diffusion region is formed at a surface of a silicon substrate. A pair of n-type source/drain regions are formed at a surface of boron diffusion region. A gate electrode is formed at a region located between paired source/drain regions with a gate insulating film therebetween. A nitrogen implanted region is formed at the surface of silicon substrate located between paired n-type source/drain regions. Nitrogen implanted region has a peak nitrogen concentration at a position of a depth not exceeding 500 Å from the surface of silicon substrate. Thereby, a transistor structure which can be easily miniaturized can be obtained.

    摘要翻译： 在硅衬底的表面上形成硼扩散区。 在硼扩散区的表面形成一对n型源/漏区。 在位于成对的源/漏区之间的区域之间形成有栅极电极，其间具有栅极绝缘膜。 在位于成对的n型源极/漏极区之间的硅衬底的表面处形成氮注入区。 氮注入区域在硅衬底表面的深度不超过500的位置具有峰值氮浓度。 由此，可以获得容易小型化的晶体管结构。

    Semiconductor device with nitrogen implanted channel region
    5.
    发明授权
    Semiconductor device with nitrogen implanted channel region 失效
    具有氮注入沟道区的半导体器件

    公开(公告)号：US6153910A

    公开(公告)日：2000-11-28

    申请号：US940400

    申请日：1997-10-01

    申请人： Hidekazu Oda ,  Shuichi Ueno ,  Takehisa Yamaguchi

    发明人： Hidekazu Oda ,  Shuichi Ueno ,  Takehisa Yamaguchi

    IPC分类号： H01L21/265 ,  H01L21/336 ,  H01L29/10 ,  H01L29/772 ,  H01L29/76

    CPC分类号： H01L21/26506 ,  H01L29/1033 ,  H01L29/105 ,  H01L29/66575

    摘要： A boron diffusion region is formed at a surface of a silicon substrate. A pair of n-type source/drain regions are formed at a surface of boron diffusion region. A gate electrode is formed at a region located between paired source/drain regions with a gate insulating film therebetween. A nitrogen implanted region is formed at the surface of silicon substrate located between paired n-type source/drain regions. Nitrogen implanted region has a peak nitrogen concentration at a position of a depth not exceeding 500 .ANG. from the surface of silicon substrate. Thereby, a transistor structure which can be easily miniaturized can be obtained.

    摘要翻译： 在硅衬底的表面上形成硼扩散区。 在硼扩散区的表面形成一对n型源/漏区。 在位于成对的源/漏区之间的区域之间形成有栅极电极，其间具有栅极绝缘膜。 在位于成对的n型源极/漏极区之间的硅衬底的表面处形成氮注入区。 氮注入区域在硅衬底表面的深度不超过500的位置具有峰值氮浓度。 由此，可以获得容易小型化的晶体管结构。

    Dynamic random access memory device and method of manufacturing
    7.
    发明授权
    Dynamic random access memory device and method of manufacturing 失效
    动态随机存取存储器件及其制造方法

    公开(公告)号：US5218217A

    公开(公告)日：1993-06-08

    申请号：US568567

    申请日：1990-08-16

    申请人： Hidekazu Oda ,  Kiyoteru Kobayashi ,  Takehisa Yamaguchi

    发明人： Hidekazu Oda ,  Kiyoteru Kobayashi ,  Takehisa Yamaguchi

    IPC分类号： H01L27/10 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/786

    CPC分类号： H01L27/10802 ,  H01L27/10805 ,  H01L29/78654

    摘要： Each memory cell of a dynamic random access memory comprises a semiconductor layer of a first conductivity type, one and the other impurity regions of a second conductivity type, a gate electrode, a capacitor impurity region of the first conductivity type, and a capacitor electrode. The semiconductor layer of the first conductivity type comprises a first surface and a second surface located opposite to the first surface. One and the other impurity regions are formed spaced apart from each other in the semiconductor layer so as to define a channel region with a channel surface being a part of the first surface of the semiconductor layer. The gate electrode is formed on the channel surface through a gate insulating film. The capacitor impurity region is formed opposing to the channel region, near the second surface of the semiconductor layer and having a concentration higher than that of the semiconductor layer. The capacitor electrode is formed on the capacitor impurity region through a dielectric film. Reduced surface area occupied by each memory cell comprising a field effect transistor and a capacitor enables miniaturization of the memory cell. Electric charges generated by the impact ionization phenomenon are stored in the capacitor, so that a power consumed in a writing operation of data can be reduced.

    摘要翻译： 动态随机存取存储器的每个存储单元包括第一导电类型的半导体层，第二导电类型的一个和另一个杂质区，第一导电类型的栅电极，电容器杂质区和电容器电极。 第一导电类型的半导体层包括第一表面和与第一表面相对的第二表面。 在半导体层中形成彼此间隔开的一个和其它杂质区，以便限定沟道区，其中沟道表面是半导体层的第一表面的一部分。 栅电极通过栅极绝缘膜形成在沟道表面上。 在半导体层的第二表面附近形成与沟道区相对的电容器杂质区，其浓度高于半导体层的浓度。 电容器电极通过电介质膜形成在电容器杂质区上。 由包括场效应晶体管和电容器的每个存储单元占用的减小的表面积使得能够使存储单元小型化。 由电击现象产生的电荷存储在电容器中，从而可以减少数据写入操作中消耗的功率。