公开(公告)号：US20110011848A1

公开(公告)日：2011-01-20

申请号：US12920366

申请日：2009-03-12

申请人： Takeshi Shimada ,  Kentaro Ino ,  Toshiki Kida

发明人： Takeshi Shimada ,  Kentaro Ino ,  Toshiki Kida

IPC分类号： H05B3/10 ,  C04B35/468 ,  E04B1/74 ,  C04B35/64

CPC分类号： H01C7/025 ,  C04B35/46 ,  C04B35/4682 ,  C04B2235/3201 ,  C04B2235/3208 ,  C04B2235/3227 ,  C04B2235/3298 ,  C04B2235/3418 ,  C04B2235/5445 ,  C04B2235/6583 ,  C04B2235/663 ,  H01C17/06533

摘要： To improve jump characteristic of BaTiO3—(Bi1/2Na1/2)TiO3 material.There is provided a process for producing a semiconductive porcelain composition in which a part of Ba is substituted with Bi—Na, the process including a step of preparing a (BaQ)TiO3 calcined powder (in which Q is a semiconductor dopant), a step of preparing a (BiNa)TiO3 calcined powder, a step of mixing the (BaQ)TiO3 calcined powder and the (BiNa)TiO3 calcined powder, a step of molding and sintering the mixed calcined powder, and a step of heat-treating the obtained sintered body at 600° C. or lower; and a PCT heater employing the element prepared by the above steps.

摘要翻译： 改善BaTiO3-（Bi1 / 2Na1 / 2）TiO3材料的跳跃特性。 提供一种制备其中一部分Ba被Bi-Na取代的半导体陶瓷组合物的方法，该方法包括制备（BaQ）TiO 3煅烧粉末（其中Q是半导体掺杂剂）的步骤，步骤 制备（BiNa）TiO 3煅烧粉末的步骤，将（BaQ）TiO 3煅烧粉末和（BiNa）TiO 3煅烧粉末混合的步骤，对混合的煅烧粉末进行成型和烧结的步骤，以及对获得的 烧结体在600℃以下; 以及使用通过上述步骤制备的元件的PCT加热器。

公开(公告)号：US08766145B2

公开(公告)日：2014-07-01

申请号：US12920366

申请日：2009-03-12

申请人： Takeshi Shimada ,  Kentaro Ino ,  Toshiki Kida

发明人： Takeshi Shimada ,  Kentaro Ino ,  Toshiki Kida

IPC分类号： H05B3/10 ,  H05B3/14 ,  C04B35/468 ,  C04B35/64

CPC分类号： H01C7/025 ,  C04B35/46 ,  C04B35/4682 ,  C04B2235/3201 ,  C04B2235/3208 ,  C04B2235/3227 ,  C04B2235/3298 ,  C04B2235/3418 ,  C04B2235/5445 ,  C04B2235/6583 ,  C04B2235/663 ,  H01C17/06533

摘要： To improve jump characteristic of BaTiO3—(Bi1/2Na1/2)TiO3 material.There is provided a process for producing a semiconductive porcelain composition in which a part of Ba is substituted with Bi—Na, the process including a step of preparing a (BaQ)TiO3 calcined powder (in which Q is a semiconductor dopant), a step of preparing a (BiNa)TiO3 calcined powder, a step of mixing the (BaQ)TiO3 calcined powder and the (BiNa)TiO3 calcined powder, a step of molding and sintering the mixed calcined powder, and a step of heat-treating the obtained sintered body at 600° C. or lower; and a PCT heater employing the element prepared by the above steps.

摘要翻译： 改善BaTiO3-（Bi1 / 2Na1 / 2）TiO3材料的跳跃特性。 提供一种制备其中一部分Ba被Bi-Na取代的半导体陶瓷组合物的方法，该方法包括制备（BaQ）TiO 3煅烧粉末（其中Q是半导体掺杂剂）的步骤，步骤 制备（BiNa）TiO 3煅烧粉末的步骤，将（BaQ）TiO 3煅烧粉末和（BiNa）TiO 3煅烧粉末混合的步骤，对混合的煅烧粉末进行成型和烧结的步骤，以及对获得的 烧结体在600℃以下; 以及使用通过上述步骤制备的元件的PCT加热器。

公开(公告)号：US20120175361A1

公开(公告)日：2012-07-12

申请号：US13391949

申请日：2010-10-05

申请人： Kentaro Ino ,  Takeshi Shimada ,  Toshiki Kida

发明人： Kentaro Ino ,  Takeshi Shimada ,  Toshiki Kida

IPC分类号： B23K13/08 ,  H01C7/02 ,  H01B1/08

CPC分类号： C04B35/4682 ,  C01G29/006 ,  C01P2002/50 ,  C01P2006/40 ,  C04B35/62685 ,  C04B35/64 ,  C04B2235/3201 ,  C04B2235/3215 ,  C04B2235/3224 ,  C04B2235/3227 ,  C04B2235/3232 ,  C04B2235/3234 ,  C04B2235/3236 ,  C04B2235/3251 ,  C04B2235/3294 ,  C04B2235/3298 ,  C04B2235/5436 ,  C04B2235/6584 ,  C04B2235/95 ,  H01B1/08 ,  H01C7/025 ,  H05B3/141 ,  H05B2203/02

摘要： There is provided a semiconductor ceramic composition in which a portion of Ba of BaTiO3 is substituted by Bi—Na, which exhibits an excellent jump characteristic while reducing room temperature resistivity and which also reduces room temperature resistivity and exhibits small change with time.A semiconductor ceramic composition which is represented by a composition formula of [(Biθ—Naδ)x(Ba1-yRy)1-x]TiO3 (where R is at least one kind of rare earth elements), in which x, y, θ and δ satisfy 0

摘要翻译： 提供了一种半导体陶瓷组合物，其中一部分BaTiO 3的Ba被Bi-Na取代，其具有优异的跳跃特性，同时降低室温电阻率，并且还降低室温电阻率并且随时间变化呈现小的变化。 由[（Bi＆amp; Naa）x（Ba1-yRy）1-x] TiO3（其中R是至少一种稀土元素）的组成式表示的半导体陶瓷组合物，其中x，y， ＆thetas; 并且δ满足0

公开(公告)号：US20130037904A1

公开(公告)日：2013-02-14

申请号：US13639804

申请日：2011-04-06

申请人： Takesha Shimada ,  Kentaro Ino ,  Toshiki Kida

发明人： Takesha Shimada ,  Kentaro Ino ,  Toshiki Kida

IPC分类号： H01L29/66

CPC分类号： C04B35/4682 ,  C04B35/4686 ,  C04B35/62675 ,  C04B35/62685 ,  C04B2235/3201 ,  C04B2235/3208 ,  C04B2235/3213 ,  C04B2235/3224 ,  C04B2235/3225 ,  C04B2235/3227 ,  C04B2235/3234 ,  C04B2235/3255 ,  C04B2235/3294 ,  C04B2235/3298 ,  C04B2235/3418 ,  C04B2235/5409 ,  C04B2235/5436 ,  C04B2235/5445 ,  C04B2235/72 ,  C04B2235/80 ,  C04B2235/85 ,  H01C7/025

摘要： An object is to provide a PTC element that can be made thinner, using a Pb-free semiconductor ceramic composition.The object is achieved with a PTC element including at least two metal electrodes and a BaTiO3 system semiconductor ceramic composition arranged between the electrodes, in which, in the semiconductor ceramic composition, a portion of Ba in the BaTiO3 system is substituted by Bi—Na and a semiconductorizing element, vacancies are formed on Bi sites by depleting at least a portion of Bi, and oxygen defects are formed on a crystal thereof. Since the PTCR characteristic at the inside of the semiconductor ceramic composition is negligibly weak in comparison with the PTCR characteristic at the interface between the semiconductor ceramic composition and the electrodes, the PTC element can be made thinner.

摘要翻译： 目的是提供一种可以使用无铅半导体陶瓷组合物制成更薄的PTC元件。 该目的是通过包括至少两个金属电极和布置在电极之间的BaTiO 3系半导体陶瓷组合物的PTC元件实现的，其中在半导体陶瓷组合物中，BaTiO 3体系中的Ba的一部分被Bi-Na取代， 半导体元件，通过耗尽至少一部分Bi而在Bi位置上形成空位，并且在其晶体上形成氧缺陷。 由于与半导体陶瓷组合物和电极之间的界面处的PTCR特性相比，半导体陶瓷组合物内部的PTCR特性可忽略不计，因此可以使PTC元件变薄。

公开(公告)号：US08686827B2

公开(公告)日：2014-04-01

申请号：US13639804

申请日：2011-04-06

申请人： Takesha Shimada ,  Kentaro Ino ,  Toshiki Kida

发明人： Takesha Shimada ,  Kentaro Ino ,  Toshiki Kida

IPC分类号： H01C7/10

CPC分类号： C04B35/4682 ,  C04B35/4686 ,  C04B35/62675 ,  C04B35/62685 ,  C04B2235/3201 ,  C04B2235/3208 ,  C04B2235/3213 ,  C04B2235/3224 ,  C04B2235/3225 ,  C04B2235/3227 ,  C04B2235/3234 ,  C04B2235/3255 ,  C04B2235/3294 ,  C04B2235/3298 ,  C04B2235/3418 ,  C04B2235/5409 ,  C04B2235/5436 ,  C04B2235/5445 ,  C04B2235/72 ,  C04B2235/80 ,  C04B2235/85 ,  H01C7/025

摘要： An object is to provide a PTC element that can be made thinner, using a Pb-free semiconductor ceramic composition.The object is achieved with a PTC element including at least two metal electrodes and a BaTiO3 system semiconductor ceramic composition arranged between the electrodes, in which, in the semiconductor ceramic composition, a portion of Ba in the BaTiO3 system is substituted by Bi—Na and a semiconductorizing element, vacancies are formed on Bi sites by depleting at least a portion of Bi, and oxygen defects are formed on a crystal thereof. Since the PTCR characteristic at the inside of the semiconductor ceramic composition is negligibly weak in comparison with the PTCR characteristic at the interface between the semiconductor ceramic composition and the electrodes, the PTC element can be made thinner.

摘要翻译： 目的是提供一种可以使用无铅半导体陶瓷组合物制成更薄的PTC元件。 该目的是通过包括至少两个金属电极和布置在电极之间的BaTiO 3系半导体陶瓷组合物的PTC元件实现的，其中在半导体陶瓷组合物中，BaTiO 3体系中的Ba的一部分被Bi-Na取代， 半导体元件，通过耗尽至少一部分Bi而在Bi位置上形成空位，并且在其晶体上形成氧缺陷。 由于与半导体陶瓷组合物和电极之间的界面处的PTCR特性相比，半导体陶瓷组合物内部的PTCR特性可忽略不计，因此可以使PTC元件变薄。

公开(公告)号：US20080217752A1

公开(公告)日：2008-09-11

申请号：US12028108

申请日：2008-02-08

申请人： Shohei Hata ,  Naoki Matsushima ,  Eiji Sakamoto ,  Ryoji Okada ,  Takanori Aono ,  Atsushi Kazama ,  Toshiki Kida

发明人： Shohei Hata ,  Naoki Matsushima ,  Eiji Sakamoto ,  Ryoji Okada ,  Takanori Aono ,  Atsushi Kazama ,  Toshiki Kida

IPC分类号： H01L23/02

CPC分类号： B81C1/00269 ,  B81C2203/019 ,  H01L2924/0002 ,  H01L2924/00

摘要： A packaging structure for hermitically sealing a functional device by solder connection at a wafer level in which a first Si substrate having a concave portion metallized on its internal surface and a second Si substrate metallized at a position opposed to said concave portion are used, the metallization applied to the internal surface of the concave portion of the first Si substrate and the metallization applied to the second Si substrate at the position opposed to the concave portion are connected by molten solder to hermetically seal the functional device between the first Si substrate and the second Si substrate, whereby the wettability of the solder for the two Si substrates is improved, the bondability between the Si substrates is enhanced, and the yield at which the package is manufactured is improved.

摘要翻译： 一种用于通过在晶片级焊接连接来密封功能器件的封装结构，其中使用在其内表面上具有金属化的凹部的第一Si衬底和在与所述凹部相对的位置上金属化的第二Si衬底，所述金属化 施加到第一Si衬底的凹部的内表面，并且在与凹部相对的位置处施加到第二Si衬底的金属化通过熔融焊料连接，以将功能器件密封在第一Si衬底和第二Si衬底之间 Si衬底，由此提高了用于两个Si衬底的焊料的润湿性，提高了Si衬底之间的粘合性，并提高了制造封装的成品率。

公开(公告)号：US07939938B2

公开(公告)日：2011-05-10

申请号：US12028108

申请日：2008-02-08

申请人： Shohei Hata ,  Naoki Matsushima ,  Eiji Sakamoto ,  Ryoji Okada ,  Takanori Aono ,  Atsushi Kazama ,  Toshiki Kida

发明人： Shohei Hata ,  Naoki Matsushima ,  Eiji Sakamoto ,  Ryoji Okada ,  Takanori Aono ,  Atsushi Kazama ,  Toshiki Kida

IPC分类号： H01L23/04

CPC分类号： B81C1/00269 ,  B81C2203/019 ,  H01L2924/0002 ,  H01L2924/00

摘要： A packaging structure for hermetically sealing a functional device by solder connection at a wafer level in which a first Si substrate having a concave portion metallized on its internal surface and a second Si substrate metallized at a position opposed to said concave portion are used, the metallization applied to the internal surface of the concave portion of the first Si substrate and the metallization applied to the second Si substrate at the position opposed to the concave portion are connected by molten solder to hermetically seal the functional device between the first Si substrate and the second Si substrate, whereby the wettability of the solder for the two Si substrates is improved, the bondability between the Si substrates is enhanced, and the yield at which the package is manufactured is improved.

摘要翻译： 一种封装结构，用于通过在晶片级焊接连接来密封功能器件，其中使用在其内表面上具有金属化的凹部的第一Si衬底和在与所述凹部相对的位置上金属化的第二Si衬底，所述金属化 施加到第一Si衬底的凹部的内表面，并且在与凹部相对的位置处施加到第二Si衬底的金属化通过熔融焊料连接，以将功能器件密封在第一Si衬底和第二Si衬底之间 Si衬底，由此提高了用于两个Si衬底的焊料的润湿性，提高了Si衬底之间的粘合性，并提高了制造封装的成品率。