公开(公告)号：US07671684B2

公开(公告)日：2010-03-02

申请号：US11994702

申请日：2005-07-05

申请人： Tamaki Honda ,  Hironori Sakamoto ,  Kenjiro Okadome

发明人： Tamaki Honda ,  Hironori Sakamoto ,  Kenjiro Okadome

IPC分类号： H03F3/04

CPC分类号： H03F1/301 ,  H03F3/193 ,  H03F2200/108 ,  H03F2200/18 ,  H03F2200/453

摘要： A FET bias circuit applies a bias voltage that is not adjusted separately to an amplifying element FET of a FET amplifying circuit. In the FET bias circuit is provided a monitor element FET m having a gate connected to the gate of the amplifying element FET a and a source connected to the source of the amplifying element FET a, respectively, and having a drain current with respect to the bias voltage substantially proportional to the drain current of the amplifying element FET a. In the FET bias circuit is further provided a fixed bias circuit for applying the bias voltage so that the amplifying element FET a enters a predetermined operating class by applying a bias voltage to the monitor element FET m so that a drain current flowing to the monitor element FET m enters a predetermined operating class.

摘要翻译： FET偏置电路施加不与FET放大电路的放大元件FET单独调整的偏置电压。 在FET偏置电路中，提供了具有连接到放大元件FETa的栅极的栅极和连接到放大元件FET a的源极的源极的监视元件FET m，并且具有相对于 基本上与放大元件FET a的漏极电流成比例的偏置电压。 在FET偏置电路中还设置有用于施加偏置电压的固定偏置电路，使得放大元件FETa通过向监视元件FET m施加偏置电压而进入预定的工作等级，使得流向监视元件的漏极电流 FET m进入预定的操作类。

公开(公告)号：US20090115526A1

公开(公告)日：2009-05-07

申请号：US11994702

申请日：2005-07-05

申请人： Tamaki Honda ,  Hironori Sakamoto ,  Kenjiro Okadome

发明人： Tamaki Honda ,  Hironori Sakamoto ,  Kenjiro Okadome

IPC分类号： H03F3/16 ,  H03G3/20

CPC分类号： H03F1/301 ,  H03F3/193 ,  H03F2200/108 ,  H03F2200/18 ,  H03F2200/453

摘要： A FET bias circuit applies a bias voltage that is not adjusted separately to an amplifying element FET of a FET amplifying circuit. In the FET bias circuit is provided a monitor element FET m having a gate connected to the gate of the amplifying element FET a and a source connected to the source of the amplifying element FET a, respectively, and having a drain current with respect to the bias voltage substantially proportional to the drain current of the amplifying element FET a. In the FET bias circuit is further provided a fixed bias circuit for applying the bias voltage so that the amplifying element FET a enters a predetermined operating class by applying a bias voltage to the monitor element FET m so that a drain current flowing to the monitor element FET m enters a predetermined operating class.

摘要翻译： FET偏置电路施加不与FET放大电路的放大元件FET单独调整的偏置电压。 在FET偏置电路中，提供了具有连接到放大元件FETa的栅极的栅极和连接到放大元件FET a的源极的源极的监视元件FET m，并且具有相对于 基本上与放大元件FET a的漏极电流成比例的偏置电压。 在FET偏置电路中还设置有用于施加偏置电压的固定偏置电路，使得放大元件FETa通过向监视元件FET m施加偏置电压而进入预定的工作等级，使得流向监视元件的漏极电流 FET m进入预定的操作类。

公开(公告)号：US07948321B2

公开(公告)日：2011-05-24

申请号：US12684251

申请日：2010-01-08

申请人： Tamaki Honda ,  Hironori Sakamoto ,  Kenjiro Okadome

发明人： Tamaki Honda ,  Hironori Sakamoto ,  Kenjiro Okadome

IPC分类号： H03F3/04

CPC分类号： H03F1/301 ,  H03F3/193 ,  H03F2200/108 ,  H03F2200/18 ,  H03F2200/453

摘要： A FET bias circuit applies a bias voltage that is not adjusted separately to an amplifying element FET of a FET amplifying circuit. In the FET bias circuit is provided a monitor element FET m having a gate connected to the gate of the amplifying element FET a and a source connected to the source of the amplifying element FET a, respectively, and having a drain current with respect to the bias voltage substantially proportional to the drain current of the amplifying element FET a. In the FET bias circuit is further provided a fixed bias circuit for applying the bias voltage so that the amplifying element FET a enters a predetermined operating class by applying a bias voltage to the monitor element FET m so that a drain current flowing to the monitor element FET m enters a predetermined operating class.

摘要翻译： FET偏置电路施加不与FET放大电路的放大元件FET单独调整的偏置电压。 在FET偏置电路中，提供了具有连接到放大元件FETa的栅极的栅极和连接到放大元件FET a的源极的源极的监视元件FET m，并且具有相对于 基本上与放大元件FET a的漏极电流成比例的偏置电压。 在FET偏置电路中还设置有用于施加偏置电压的固定偏置电路，使得放大元件FETa通过向监视元件FET m施加偏置电压而进入预定的工作等级，使得流向监视元件的漏极电流 FET m进入预定的操作类。

公开(公告)号：US06486724B2

公开(公告)日：2002-11-26

申请号：US09773354

申请日：2001-01-31

申请人： Hironori Sakamoto ,  Tamaki Honda ,  Taketo Takahashi

发明人： Hironori Sakamoto ,  Tamaki Honda ,  Taketo Takahashi

IPC分类号： H03K17687

CPC分类号： H03F1/306 ,  H03F2200/447 ,  H03F2200/75

摘要： A circuit for biasing an FET, comparing a gate bias voltage of the FET with a reference voltage at an operational amplifier and performing closed-loop control on the gate bias voltage of the FET with the output of the operational amplifier. The temperature characteristics of the mutual conductance of the FET is compensated by setting the temperature characteristics of one or both of two voltage dividing resistors. Variations in a drain bias current due to input signal level and temperature changes can be suppressed. The circuit at the gate and the circuit at the drain are separate, making possible class A, class AB, and class B operations. The voltage drop at the gate resistor can be ignored so that the gate resistor can be designed with priority given to stability of the RF characteristics.

摘要翻译： 用于偏置FET的电路，将FET的栅极偏置电压与运算放大器的参考电压进行比较，并且利用运算放大器的输出对FET的栅极偏置电压执行闭环控制。 通过设置两个分压电阻中的一个或两个的温度特性来补偿FET的互导的温度特性。 可以抑制由输入信号电平和温度变化引起的漏极偏置电流的变化。 栅极电路和漏极电路分开，使A类，AB类和B类工作成为可能。 可以忽略栅极电阻器处的电压降，从而可以根据RF特性的稳定性优先设计栅极电阻器。

公开(公告)号：US06539202B1

公开(公告)日：2003-03-25

申请号：US09448057

申请日：1999-11-23

申请人： Kazuo Yamashita ,  Hironori Sakamoto ,  Tomohiro Sanpei ,  Tamaki Honda ,  Hiroshi Morita

发明人： Kazuo Yamashita ,  Hironori Sakamoto ,  Tomohiro Sanpei ,  Tamaki Honda ,  Hiroshi Morita

IPC分类号： H04B1500

CPC分类号： H04B1/109

摘要： An interference canceling device comprising a flat phase IF narrow band BPF. A signal which has been branched from a signal on the main line is filtered by the BPF and is recombined with the signal on the main line. Phase rotation caused by frequency separation from the pass band center frequency does not occur because the phase characteristics of the BPF are substantially flat in the pass band. Thus, interference existing not only in a pin-point frequency, but over a band of frequencies can be cancelled.

摘要翻译： 一种包括平坦相IF窄带BPF的干扰消除装置。 从主线上的信号分支的信号被BPF滤波，并与主线上的信号重新组合。 由于BPF的相位特性在通带中基本平坦，所以不会发生由通带中心频率的频率分离引起的相位旋转。 因此，不仅存在针脚频率，而且在频带上存在的干扰可以被消除。

公开(公告)号：US08219963B2

公开(公告)日：2012-07-10

申请号：US12457374

申请日：2009-06-09

申请人： Hironori Sakamoto

发明人： Hironori Sakamoto

IPC分类号： G06F17/50 ,  G06F7/60 ,  G06F17/10

CPC分类号： G06F17/5018

摘要： In a support apparatus for analysis and design of a semiconductor device, a function indicating an impurity concentration distribution in a channel region of a first transistor in a depth direction is set. A structure data indicating a structure of a transistor device and a measurement value of each of electric characteristics of the transistor are related. A Poisson's equation, which is express by using the function, is solved by using a depletion layer width as a variable to calculate a surface potential, and a first calculation value of the electric characteristic of the first transistor is calculated by using the surface potential. A determining section determines the function to indicate the impurity concentration distribution of a first transistor when a measurement value corresponding to a first structure data which indicates a structure of the first transistor, and the first calculation value are substantially coincident with each other.

摘要翻译： 在用于半导体器件的分析和设计的支持设备中，设置指示在深度方向上的第一晶体管的沟道区域中的杂质浓度分布的函数。 指示晶体管器件的结构的结构数据和晶体管的每个电特性的测量值都相关。 通过使用耗尽层宽度作为变量来计算表面电位，通过使用该函数表示的泊松方程，并且通过使用表面电位来计算第一晶体管的电特性的第一计算值。 当与表示第一晶体管的结构的第一结构数据相对应的测量值和第一计算值基本上一致时，确定部分确定指示第一晶体管的杂质浓度分布的函数。

公开(公告)号：US20090319966A1

公开(公告)日：2009-12-24

申请号：US12457374

申请日：2009-06-09

申请人： Hironori Sakamoto

发明人： Hironori Sakamoto

IPC分类号： G06F17/50

CPC分类号： G06F17/5018

摘要： In a support apparatus for analysis and design of a semiconductor device, a function indicating an impurity concentration distribution in a channel region of a first transistor in a depth direction is set. A structure data indicating a structure of a transistor device and a measurement value of each of electric characteristics of the transistor are related. A Poisson's equation, which is express by using the function, is solved by using a depletion layer width as a variable to calculate a surface potential, and a first calculation value of the electric characteristic of the first transistor is calculated by using the surface potential. A determining section determines the function to indicate the impurity concentration distribution of a first transistor when a measurement value corresponding to a first structure data which indicates a structure of the first transistor, and the first calculation value are substantially coincident with each other, and stores the function in the storage section. The above operations are repeated until the first calculation value and the measurement value are substantially coincident with each other.

摘要翻译： 在用于半导体器件的分析和设计的支持设备中，设置指示在深度方向上的第一晶体管的沟道区域中的杂质浓度分布的函数。 指示晶体管器件的结构的结构数据和晶体管的每个电特性的测量值都相关。 通过使用耗尽层宽度作为变量来计算表面电位，通过使用该函数表示的泊松方程，并且通过使用表面电位来计算第一晶体管的电特性的第一计算值。 当与表示第一晶体管的结构的第一结构数据相对应的测量值和第一计算值基本上一致时，确定部分确定表示第一晶体管的杂质浓度分布的函数，并且存储 功能在存储部分。 重复上述操作，直到第一计算值和测量值彼此基本一致。

公开(公告)号：US06577993B1

公开(公告)日：2003-06-10

申请号：US09386304

申请日：1999-08-31

申请人： Hironori Sakamoto

发明人： Hironori Sakamoto

IPC分类号： G06F1750

CPC分类号： G06F17/5018

摘要： In a method of extracting parameters of a diffusion model from object parameters to be used in a process simulation of a semiconductor manufacturing process, classifying the object parameters into a first through an N-th (N being a natural integer not smaller than 2) groups, the first group being used for classifying thereinto the most fundamental physical and least model-dependent parameters, the N-th group being used for classifying thereinto the least fundamental physical and most model-dependent parameters, and extracting successively the classified parameters in the first through the N-th groups in the order from the first to the N-th group.

摘要翻译： 在从半导体制造过程的过程模拟中使用的对象参数提取扩散模型的参数的方法中，将目标参数分为第一至第N（N为不小于2的自然整数）组 第一组被用于分类最基本的物理和最不依赖模型的参数，第N组被用于对其中的最基本的物理和最依赖模型的参数进行分类，并连续地提取第一组中的分类参数 通过N组从第一组到第N组的顺序。

公开(公告)号：US07222060B2

公开(公告)日：2007-05-22

申请号：US10668974

申请日：2003-09-24

申请人： Takashi Shimizu ,  Hironori Sakamoto

发明人： Takashi Shimizu ,  Hironori Sakamoto

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： From the data of diffusion-length-dependent parameters extracted from the parameters of the transistor model of MOS transistors and from the parameters of transistors having various diffusion lengths, a diffusion-length-dependent parameter correcting unit creates approximate expressions of the diffusion length dependence of these parameters, and calculates parameter correction values to be used instead of original parameter values by using the created approximate expressions. Hence, the correction values can be used easily instead of the original parameter values, whereby a transistor model of MOS transistors having a different diffusion length DL can be created easily. Circuit simulation in consideration of the diffusion length dependence of the drain currents of MOS transistors can thus be carried out, whereby highly accurate simulation can be attained.

摘要翻译： 根据从MOS晶体管的晶体管模型的参数和具有各种扩散长度的晶体管的参数提取的扩散长度相关参数的数据，扩散长度相关参数校正单元产生扩散长度依赖性的近似表达式 这些参数，并通过使用创建的近似表达式计算要使用的参数校正值而不是原始参数值。 因此，可以容易地使用校正值而不是原始参数值，由此可以容易地创建具有不同扩散长度DL的MOS晶体管的晶体管模型。 考虑到MOS晶体管的漏极电流的扩散长度依赖性的电路仿真可以进行，从而可以实现高精度的仿真。

公开(公告)号：US06489844B2

公开(公告)日：2002-12-03

申请号：US09735759

申请日：2000-12-13

申请人： Kazuo Yamashita ,  Akira Ito ,  Hironori Sakamoto ,  Keijiro Ito ,  Akira Yamada ,  Norihisa Kawasumi

发明人： Kazuo Yamashita ,  Akira Ito ,  Hironori Sakamoto ,  Keijiro Ito ,  Akira Yamada ,  Norihisa Kawasumi

IPC分类号： H03F366

CPC分类号： H03F1/3235

摘要： A feed-forward amplifier and a controller thereof. Two types of second pilot signals, sum frequency and difference frequency of a base pilot signal and a local oscillation signal, are generated by an injection-side mixer and injected into a distortion detection loop. Part of a signal appearing at an output terminal is branched, converted in frequency by a detection-side mixer using the local oscillation signal, filtered by a narrow-band filter, input to a synchronizing detector with the filtered output of the filter as error signals, and synchronizing detected with reference to the base pilot signal so as to generate control signals for a distortion rejection loop. The spectrums of the second pilot signals may be spread. A process to cancel the input signal component at the detection side may be performed. A simple circuit configuration enhances the distortion component rejection and suppression effect and shortens the time required until an optimum control state is established.

摘要翻译： 一种前馈放大器及其控制器。 通过注入侧混频器产生两种类型的第二导频信号，基频导频信号和本地振荡信号的和频和差频，并将其注入到失真检测环路中。 出现在输出端子处的信号的一部分通过检测侧混频器被分频，使用本地振荡信号进行滤波，由窄带滤波器滤波，输入到同步检测器，滤波器的滤波器作为误差信号 并且参考基准导频信号进行同步检测，以产生用于失真抑制环路的控制信号。 可以扩展第二导频信号的频谱。 可以执行消除检测侧的输入信号分量的处理。 简单的电路配置增强了失真分量抑制和抑制效果，缩短了所需的时间，直到建立最佳控制状态。