公开(公告)号：US20110181556A1

公开(公告)日：2011-07-28

申请号：US11665332

申请日：2005-09-09

申请人： Tamotsu Sakai ,  Tomoyuki Nagai ,  Kazuhiro Maeda ,  Shuji Nishi ,  Masakazu Satoh

发明人： Tamotsu Sakai ,  Tomoyuki Nagai ,  Kazuhiro Maeda ,  Shuji Nishi ,  Masakazu Satoh

IPC分类号： G06F3/038 ,  H03M9/00

CPC分类号： G09G3/3685 ,  G09G2330/021

摘要： The present invention relates to a serial-parallel conversion circuit of a display device.First latch circuits for sampling and latching a serial signal in accordance with sampling pulses outputted from a shift register (31) are provided in association with stages of the shift register (31). In addition, second latch circuits for latching signals outputted from the first latch circuits are provided in association with portions of the stages of the shift register (31). In this case, of all the stages of the shift register (31), the number of stages associated with the second latch circuits is less than the total number of stages of the shift register by two or more.

摘要翻译： 本发明涉及一种显示装置的串并转换电路。 与移位寄存器（31）的各级相关联地提供用于根据从移位寄存器（31）输出的采样脉冲采样和锁存串行信号的第一锁存电路。 此外，用于锁存从第一锁存电路输出的信号的第二锁存电路与移位寄存器（31）的各个级的部分相关联地被提供。 在这种情况下，在移位寄存器（31）的所有阶段中，与第二锁存电路相关联的级数小于移位寄存器的总数量两个或更多。

公开(公告)号：US20090051678A1

公开(公告)日：2009-02-26

申请号：US11887783

申请日：2006-04-03

申请人： Masakazu Satoh ,  Tomoyuki Nagai ,  Kazuhiro Maeda ,  Tamotsu Sakai ,  Shuji Nishi

发明人： Masakazu Satoh ,  Tomoyuki Nagai ,  Kazuhiro Maeda ,  Tamotsu Sakai ,  Shuji Nishi

IPC分类号： G06F3/038

CPC分类号： G09G3/3688 ,  G09G3/2092 ,  G09G3/3696 ,  G09G2310/0289

摘要： A readily-mountable low-cost active matrix display apparatus with a setup function is provided. A serial interface circuit 20 and setup circuits 16 are each formed of TFT elements on a liquid crystal panel 11. The serial interface circuit 20 performs serial-parallel conversion on a setup control signal 17 serially inputted via setup terminals 15. The setup circuits 16 change the states of signals flowing in the liquid crystal panel 11 in accordance with signals outputted in parallel from the serial interface circuit 20. Thus, it is possible to change the potential, timing, etc., of signals inputted to or outputted from any peripheral circuits formed on the liquid crystal panel 11 or any peripheral circuits included in a semiconductor chip mounted on the surface of the liquid crystal panel 11.

摘要翻译： 提供了具有设置功能的易于安装的低成本有源矩阵显示装置。 串行接口电路20和设置电路16各自由液晶面板11上的TFT元件形成。串行接口电路20对通过设置端子15串行输入的设置控制信号17进行串行 - 并行转换。设置电路16改变 根据从串行接口电路20并行输出的信号在液晶面板11中流动的信号的状态。因此，可以改变输入到或从任何外围电路输出的信号的电位，定时等 形成在液晶面板11上或包含在安装在液晶面板11的表面上的半导体芯片中的任何外围电路。

公开(公告)号：US08094116B2

公开(公告)日：2012-01-10

申请号：US11665332

申请日：2005-09-09

申请人： Tamotsu Sakai ,  Tomoyuki Nagai ,  Kazuhiro Maeda ,  Shuji Nishi ,  Masakazu Satoh

发明人： Tamotsu Sakai ,  Tomoyuki Nagai ,  Kazuhiro Maeda ,  Shuji Nishi ,  Masakazu Satoh

IPC分类号： G09G3/36

CPC分类号： G09G3/3685 ,  G09G2330/021

摘要： The present invention relates to a serial-parallel conversion circuit of a display device.First latch circuits for sampling and latching a serial signal in accordance with sampling pulses outputted from a shift register (31) are provided in association with stages of the shift register (31). In addition, second latch circuits for latching signals outputted from the first latch circuits are provided in association with portions of the stages of the shift register (31). In this case, of all the stages of the shift register (31), the number of stages associated with the second latch circuits is less than the total number of stages of the shift register by two or more.

摘要翻译： 本发明涉及一种显示装置的串并转换电路。 与移位寄存器（31）的各级相关联地提供用于根据从移位寄存器（31）输出的采样脉冲采样和锁存串行信号的第一锁存电路。 此外，用于锁存从第一锁存电路输出的信号的第二锁存电路与移位寄存器（31）的各个级的部分相关联地被提供。 在这种情况下，在移位寄存器（31）的所有阶段中，与第二锁存电路相关联的级数小于移位寄存器的总数量两个或更多个。

公开(公告)号：US20090201274A1

公开(公告)日：2009-08-13

申请号：US11664084

申请日：2005-09-28

申请人： Nobuhiro Kuwabara ,  Tomoyuki Nagai ,  Tamotsu Sakai ,  Kazuhiro Maeda ,  Shuji Nishi ,  Masakazu Satoh

发明人： Nobuhiro Kuwabara ,  Tomoyuki Nagai ,  Tamotsu Sakai ,  Kazuhiro Maeda ,  Shuji Nishi ,  Masakazu Satoh

IPC分类号： G09G5/00

CPC分类号： G09G3/20 ,  G09G3/3648 ,  G09G2310/08 ,  G09G2330/021

摘要： A timing signal generating device for a matrix-type display apparatus is disclosed, conducive to reduction of power consumption, the matrix-type display apparatus including the timing signal generating device, and a driving method thereof. In at least one embodiment, a timing signal generating apparatus provided in an active-matrix liquid crystal display apparatus includes a horizontal direction counter and a vertical direction counter for counting a clock number; and a horizontal counter cessation circuit and a vertical counter cessation circuit for stopping the horizontal direction counter and the vertical direction counter at a predetermined timing. With this structure, at least one embodiment of the present invention achieves reduction in power consumption in the liquid crystal display apparatus.

摘要翻译： 公开了一种用于矩阵型显示装置的定时信号产生装置，有助于降低功耗，包括定时信号产生装置的矩阵型显示装置及其驱动方法。 在至少一个实施例中，设置在有源矩阵液晶显示装置中的定时信号发生装置包括水平方向计数器和用于对时钟数进行计数的垂直方向计数器; 以及用于在预定定时停止水平方向计数器和垂直方向计数器的水平计数器停止电路和垂直计数器停止电路。 利用这种结构，本发明的至少一个实施例实现了液晶显示装置的功耗的降低。

公开(公告)号：US06724363B1

公开(公告)日：2004-04-20

申请号：US09568889

申请日：2000-05-11

申请人： Masakazu Satoh ,  Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Michael James Brownlow ,  Graham Andrew Cairns

发明人： Masakazu Satoh ,  Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Michael James Brownlow ,  Graham Andrew Cairns

IPC分类号： G09G336

CPC分类号： G11C19/00 ,  G09G3/3674 ,  G09G3/3685 ,  G09G2310/0283 ,  G09G2310/0289 ,  G09G2330/021 ,  G11C19/28

摘要： A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease. Consequently, there can be provided a shift register that is capable of shifting in two directions, that can normally operate even with an input signal having a small amplitude, and that therefore consumes less electric power.

公开(公告)号：US07365727B2

公开(公告)日：2008-04-29

申请号：US10788161

申请日：2004-02-25

申请人： Masakazu Satoh ,  Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Michael James Brownlow ,  Graham Andrew Cairns

发明人： Masakazu Satoh ,  Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Michael James Brownlow ,  Graham Andrew Cairns

IPC分类号： G09G3/36

CPC分类号： G11C19/00 ,  G09G3/3674 ,  G09G3/3685 ,  G09G2310/0283 ,  G09G2310/0289 ,  G09G2330/021 ,  G11C19/28

摘要： A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease. Consequently, there can be provided a shift register that is capable of shifting in two directions, that can normally operate even with an input signal having a small amplitude, and that therefore consumes less electric power.

摘要翻译： 移位寄存器具有移位寄存器部分，该移位寄存器部分由与时钟信号同步操作的多级触发器组成;以及电平移位器，用于升压低于驱动电压的启动信号，并将其施加到两端 的移位寄存器，并且移位寄存器能够根据切换信号切换移位方向。 上述电平移位器是电流驱动型电平移位器，即使在晶体管特性较差的情况下或者在快速操作的情况下也能够工作，并且即使利用具有小振幅的启动信号也能进行电平移位。 此外，上述电平移位器分别设置在移位寄存器部分的两端，并且其中一个电平移位器根据切换信号停止工作，从而消耗的功率应该减小。 因此，可以提供能够在两个方向上移位的移位寄存器，即使在具有小幅度的输入信号的情况下也能正常地进行操作，因此消耗较少的电力。

公开(公告)号：US08271781B2

公开(公告)日：2012-09-18

申请号：US12794210

申请日：2010-06-04

申请人： Masakazu Satoh

发明人： Masakazu Satoh

IPC分类号： H04L29/06 ,  H04L9/32 ,  G06F7/04

CPC分类号： G06F21/445 ,  G06F21/33 ,  G06F21/34 ,  G06F2221/2103

摘要： A method for authentication. A computer obtains a random number R generated by a hardware token. The computer forms and returns to the hardware token a signature Ck′(R) formed using the random number R with a computer secret key Ck′. The computer receiving from the hardware token authentication of the signature Ck′(R) that is performed by the hardware token using a computer public key Ck stored in the hardware token.

摘要翻译： 一种验证方法。 计算机获得由硬币令牌产生的随​​机数R。 计算机形成并使用具有计算机秘密密钥Ck'的随机数R形成的签名Ck'（R）返回到硬件令牌。 计算机从使用存储在硬件令牌中的计算机公开密钥Ck由硬件令牌执行的签名Ck'（R）的硬件令牌认证接收。

公开(公告)号：US20100103153A1

公开(公告)日：2010-04-29

申请号：US12654397

申请日：2009-12-18

申请人： Masakazu Satoh ,  Hajime Washio ,  Sadahiko Yasukawa

发明人： Masakazu Satoh ,  Hajime Washio ,  Sadahiko Yasukawa

IPC分类号： G09G5/00 ,  H04N3/00

CPC分类号： G09G3/3677 ,  G02F1/1362 ,  G09G2300/0452 ,  G09G2310/0218 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2320/0209

摘要： A plurality of scanning signal lines GLn divided into groups, and each group is made up of three scanning signal lines GLnR, GLnG and GLnB, and a plurality of pixels are divided into pixel blocks, and each pixel block is made up of three pixels PR (n, m), PG (n, m) and PB (n, m) respectively connected to the scanning signal lines GLnR, GLnG and GLnB. These pixels PR (n, m), PG (n, m) and PB (n, m) are connected to a common data signal line SLm. To the scanning signal lines GLnR, GLnG, GLnB, scanning pulses are sequentially outputted to the scanning signal lines GLnR, GLnG and GLnB from shift registers SRnR, SRnG and SRnB, and video signals for R, G and B are outputted to the data signal line SLm from a driver IC by time division.

公开(公告)号：US20060209893A1

公开(公告)日：2006-09-21

申请号：US11375619

申请日：2006-03-14

申请人： Masakazu Satoh ,  Kazunari Suzuki

发明人： Masakazu Satoh ,  Kazunari Suzuki

IPC分类号： H04L12/56

CPC分类号： H04L47/10 ,  H04L47/11 ,  H04L47/2433 ,  H04L47/30

摘要： A communication relay apparatus, information management system, and control method and program therefor. The communication relay apparatus includes several communication ports, and that includes a communication relay section, a buffer, a control signal transmitting section, a bandwidth information acquiring section, and a transmission interval control section.

摘要翻译： 通信中继装置，信息管理系统及其控制方法及程序。 通信中继装置包括多个通信端口，包括通信中继部，缓冲器，控制信号发送部，带宽信息获取部，发送间隔控制部。

公开(公告)号：US08368676B2

公开(公告)日：2013-02-05

申请号：US12526887

申请日：2008-05-19

申请人： Masakazu Satoh ,  Hiromi Katoh ,  Benjamin James Hadwen

发明人： Masakazu Satoh ,  Hiromi Katoh ,  Benjamin James Hadwen

IPC分类号： G06F3/038

CPC分类号： H01L31/02164 ,  G01J1/4204 ,  G01J2001/0276 ,  G02F1/136209 ,  H01L27/12 ,  H01L29/78633 ,  H01L31/02019 ,  H01L31/035281 ,  H01L31/112

摘要： A light shield (204) for blocking light traveling toward a PIN photodiode (413) from a glass substrate (314) side is formed of a conductive material, and a reference electric potential (Vr−nVoc) equal to that of a cathode of the PIN photodiode (413) is applied to the light shield (204) from a power supply circuit (266). Thus, inductive noise for a photoelectric conversion device used for an ambient light sensor is further reduced in a display device.

摘要翻译： 用于阻挡从玻璃基板（314）侧朝向PIN光电二极管（413）移动的光的遮光罩（204）由导电材料形成，并且基准电位（Vr-nVoc）等于 PIN光电二极管（413）从电源电路（266）施加到遮光罩（204）。 因此，在显示装置中，用于环境光传感器的光电转换装置的感应噪声进一步降低。