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公开(公告)号：US20240267011A1
公开(公告)日：2024-08-08
申请号：US18635728
申请日：2024-04-15
发明人： Christian ELGAARD , Henrik SJÖLAND
IPC分类号： H03F3/24
CPC分类号： H03F3/245 , H03F2200/451
摘要： A bias circuit for a PA. A first transistor has its drain terminal and its gate terminal connected to a first circuit node and its source terminal connected to a first supply terminal, a first current source connected to the first circuit node, and a first resistor connected between the first and second circuit nodes. A second transistor receives a first component of a differential input signal to the PA at its gate terminal, has its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal, and a third transistor receives a second component of the differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal. The gates terminals of the second and third transistors are biased by a first voltage.
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公开(公告)号：US20230223943A1
公开(公告)日：2023-07-13
申请号：US18001618
申请日：2020-06-17
CPC分类号： H03L7/085 , G04F10/005 , H03M1/12
摘要： A frequency determination device for determining a frequency relationship between a reference signal and a clock signal. Each constituent TDC is configured to provide a digitally represented constituent output signal in response to receiving a constituent reference signal and a constituent clock signal, and the frequency determination device is configured to successively provide respectively delayed versions of the constituent clock signal of a first constituent TDC as respective constituent clock signals to the other constituent TDC:s. The reference signal provider is configured to provide the respective constituent reference. The switching circuitry is configured to provide the reference signal as the constituent clock signal to the first constituent TDC. The determination circuitry is configured to determine a number of consecutively same-valued symbols in a concatenation of the digitally represented constituent output signals of the constituent TDC:s, and to determine the frequency relationship.
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公开(公告)号：US20160352496A1
公开(公告)日：2016-12-01
申请号：US15117219
申请日：2014-02-20
发明人： Henrik SJÖLAND
CPC分类号： H04L5/1461 , H04B1/18 , H04B1/525
摘要： An electronic circuit (51) configured to provide an adjustable impedance at a first frequency comprises a transconductance amplifier (52) arranged to provide a current signal proportional to an input signal at an input terminal; at least one conversion arrangement, each comprising a mixer arrangement (53) utilizing a first local oscillator signal at said frequency to down-convert the current signal to a baseband voltage signal; a filtering arrangement (54, 55) connected to said mixer arrangement (53) and comprising at least a resistor and a capacitor in parallel; and a mixer arrangement (56) utilizing a second local oscillator signal at said frequency to up-convert a voltage signal present at the filter arrangement to an up-converted voltage signal; and a transconductance amplifier (57) arranged to provide a second current signal proportional to the up-converted voltage signal and to feed back said second current signal to the input terminal of the electronic circuit.
摘要翻译： 被配置为以第一频率提供可调阻抗的电子电路（51）包括跨导放大器（52），其布置成提供与输入端子处的输入信号成比例的电流信号; 至少一个转换装置，每个转换装置包括利用所述频率的第一本地振荡器信号将当前信号下变频为基带电压信号的混频器装置（53） 连接到所述混合器装置（53）并且至少包括电阻器和并联的电容器的滤波装置（54,55）; 以及利用在所述频率处的第二本地振荡器信号将存在于滤波器装置处的电压信号上变频为上变频电压信号的混频器装置（56） 和跨导放大器（57），布置成提供与上变频电压信号成比例的第二电流信号，并将所述第二电流信号反馈给电子电路的输入端。
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公开(公告)号：US20220123697A1
公开(公告)日：2022-04-21
申请号：US17421289
申请日：2019-08-29
发明人： Christian ELGAARD , Henrik SJÖLAND
IPC分类号： H03F3/24
摘要： A bias circuit for a PA. A first transistor has its drain terminal and its gate terminal connected to a first circuit node and its source terminal connected to a first supply terminal, a first current source connected to the first circuit node, and a first resistor connected between the first and second circuit nodes. A second transistor receives a first component of a differential input signal to the PA at its gate terminal, has its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal, and a third transistor receives a second component of the differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal. The gates terminals of the second and the third transistors are biased by a first voltage.
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公开(公告)号：US20210314009A1
公开(公告)日：2021-10-07
申请号：US17057080
申请日：2018-06-01
发明人： Henrik SJÖLAND , Lars SUNDSTRÖM
摘要： A method of a wireless transmitter is disclosed. The method is for mitigation of distortion caused by non-linear hardware components of the transmitter, wherein mitigation of distortion comprises mitigating at least one intermodulation component, wherein the transmitter is configured to process an input signal having an input signal spectrum, and wherein the transmitter comprises two or more signal branches, each signal branch comprising a respective non-linear hardware component. The method comprises modifying the input signal for a first one of the signal branches by applying a first phase shift to a first part of the input signal spectrum, wherein the first phase shift has a first sign and a first absolute value, and applying a second phase shift to a second part of the input signal spectrum. The second phase shift has a second sign which is opposite to the first sign, and a second absolute value which is equal to the first absolute value. The first and second parts are non-overlapping. The method also comprises modifying the input signal for a second one of the signal branches by applying the first phase shift to the second part of the input signal spectrum, and applying the second phase shift to the first part of the input signal spectrum. The method further comprises feeding the modified input signals to respective ones of the signal branches. Corresponding apparatus, wireless transmitter, communication device, and computer program product are also disclosed.
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公开(公告)号：US20200235769A1
公开(公告)日：2020-07-23
申请号：US16488390
申请日：2017-07-12
发明人： Leif WILHELMSSON , Miguel LOPEZ , Henrik SJÖLAND
摘要： A radio receiver includes a local oscillator arrangement and a controller. The local oscillator arrangement is arranged to provide a signal for down-conversion of radio frequency signal to an intermediate frequency or a baseband frequency in the radio receiver, and the local oscillator arrangement is capable of selectably providing multiple frequency generation qualities. The controller is arranged to estimate a tolerable frequency generation quality for the current operation of the radio receiver or determine whether the current operation of the radio receiver is satisfactory in sense of a currently provided frequency generation quality, and based on the estimation or determination adjust frequency generation quality of the local oscillator arrangement by selecting one of the multiple frequency generation qualities. A radio arrangement, a method and a computer program are also disclosed.
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公开(公告)号：US20230179239A1
公开(公告)日：2023-06-08
申请号：US17926020
申请日：2020-05-18
发明人： Miguel LOPEZ , Leif WILHELMSSON , Henrik SJÖLAND
CPC分类号： H04B1/0475 , H04L27/36
摘要： A wireless communication node (500) and method therein for generating and transmitting a modulated radio frequency (RF) signal by means of backscattering are disclosed. The wireless communication node (500) comprises an antenna (510) configured to receive a illuminating RF signal, a switch (520) that has M states, a set of impedances (530) comprising Mimpedances (Z1, Z2 . . . ZM). The antenna (510) is coupled to the set of impedances (530) by the switch (520). The wireless communication node (500) further comprises a modulating value generator (540) configured to generate modulating values based on data to be transmitted and a frequency offset and a switch controller (550) configured to switch the state of the switch (520) based on the generated modulating values such that the antenna (510) is connected to a selected impedance among the M impedances. The received illuminating RF signal at the antenna (510) is modulated by the generated modulating values and reflected by the antenna (510) to generate and transmit the modulated RF signal. The switching rate is an integer multiple of the data rate, the integer is greater than 1 and the center frequency of the modulated RF signal has the frequency offset with respect to the center frequency of the received illuminating RF signal.
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公开(公告)号：US20220256460A1
公开(公告)日：2022-08-11
申请号：US17624701
申请日：2019-07-05
发明人： Henrik SJÖLAND , Leif WILHELMSSON
摘要： A method for a wake-up transmitter comprises generating a wakeup signal (WUS) from a digital WUS sequence having an information symbol rate and a corresponding information symbol bandwidth, and transmitting the WUS over a frequency range having a signal bandwidth, wherein the signal bandwidth is larger than twice the information symbol rate, and wherein any frequency interval comprised in the frequency range conveys the digital WUS sequence when a width of the frequency interval is at least the information symbol bandwidth. A corresponding method for a wake-up receiver comprises receiving the WUS over the frequency range, and filtering the received WUS through a filter having a filter bandwidth for passing the information symbol bandwidth of the received WUS. Corresponding apparatuses, wake-up transmitter, wake-up receiver, communication device and computer program product are also disclosed.
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公开(公告)号：US20220078068A1
公开(公告)日：2022-03-10
申请号：US17423660
申请日：2019-01-25
发明人： Leif WILHELMSSON , Henrik SJÖLAND , Miguel LOPEZ
IPC分类号： H04L27/36
摘要： A transmitter and method therein for transmitting a signal to a receiver in a wireless communication system are disclosed. The transmitter is configured to modulate a signal using two different modulations, a combination of binary amplitude shill keying, ASK, and binary frequency shift keying, FSK, and transmit the modulated signal.
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公开(公告)号：US20200014331A1
公开(公告)日：2020-01-09
申请号：US16489551
申请日：2017-03-01
发明人： Staffan EK , Tony PÅHLSSON , Henrik SJÖLAND
摘要： A system for phase control of a Phased Locked Loop, PLL, is disclosed. The system includes the PLL. The PLL includes an oscillator configured to generate an output signal; a frequency divider configured to generate a feedback signal by dividing the output signal from the oscillator; a first phase detector arrangement configured to output a first control signal to control the oscillator in response to a detection of a phase deviation between a reference signal and the feedback signal. A second phase detector is configured to receive the feedback signal from the frequency divider and the reference signal, and generate an output signal. A phase calibration circuit is configured to receive the output signal from the second phase detector and generate a second control signal to adjust a phase of the output signal of the oscillator.
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