公开(公告)号：US20160163782A1

公开(公告)日：2016-06-09

申请号：US15008619

申请日：2016-01-28

Applicant: Texas Instruments Incorporated

Inventor： John Paul CAMPBELL ,  Kaiping LIU

IPC: H01L49/02 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/027

CPC classification number: H01L28/60 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02301 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/0273 ,  H01L21/28035 ,  H01L21/285 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/3211 ,  H01L21/32133 ,  H01L21/32139 ,  H01L27/0629

Abstract: A process of forming an integrated circuit forms a high precision capacitor bottom plate with a metallic surface and performs a plasma treatment of the metallic surface. A high precision capacitor dielectric is formed by depositing a first layer of the capacitor dielectric on the high precision capacitor bottom plate wherein the first layer is silicon nitride, depositing a second layer of the capacitor dielectric on the first layer wherein the second portion is silicon dioxide, and depositing a third layer of the capacitor dielectric on the second portion wherein the third layer is silicon nitride. Plasma treatments may also be performed on the layers of capacitor dielectric pre- and/or post-deposition. A metallic high precision capacitor top plate is formed on the high precision capacitor dielectric.

Abstract translation: 形成集成电路的工艺形成具有金属表面的高精度电容器底板，并执行金属表面的等离子体处理。 通过在第一层为氮化硅的高精度电容器底板上沉积电容器电介质的第一层而形成高精度电容器电介质，在第一层上沉积第二层电容器电介质，其中第二部分是二氧化硅 并且在第二部分上沉积电容器电介质的第三层，其中第三层是氮化硅。 也可以在电容器电介质预沉积和/或沉积后的层上进行等离子体处理。 在高精度电容器电介质上形成金属高精度电容器顶板。

公开(公告)号：US20150187598A1

公开(公告)日：2015-07-02

申请号：US14576736

申请日：2014-12-19

Applicant: Texas Instruments Incorporated

Inventor： John Paul CAMPBELL ,  Kaiping LIU

IPC: H01L21/321 ,  H01L21/3213 ,  H01L21/28 ,  H01L49/02 ,  H01L21/285

CPC classification number: H01L28/60 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02301 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/0273 ,  H01L21/28035 ,  H01L21/285 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/3211 ,  H01L21/32133 ,  H01L21/32139 ,  H01L27/0629

Abstract: A process of forming an integrated circuit forms a high precision capacitor bottom plate with a metallic surface and performs a plasma treatment of the metallic surface. A high precision capacitor dielectric is formed by depositing a first layer of the capacitor dielectric on the high precision capacitor bottom plate wherein the first layer is silicon nitride, depositing a second layer of the capacitor dielectric on the first layer wherein the second portion is silicon dioxide, and depositing a third layer of the capacitor dielectric on the second portion wherein the third layer is silicon nitride. Plasma treatments may also be performed on the layers of capacitor dielectric pre-and/or post-deposition. A metallic high precision capacitor top plate is formed on the high precision capacitor dielectric.

Abstract translation: 形成集成电路的工艺形成具有金属表面的高精度电容器底板，并执行金属表面的等离子体处理。 通过在第一层为氮化硅的高精度电容器底板上沉积电容器电介质的第一层而形成高精度电容器电介质，在第一层上沉积第二层电容器电介质，其中第二部分是二氧化硅 并且在第二部分上沉积电容器电介质的第三层，其中第三层是氮化硅。 也可以在电容器介质预沉积和/或沉积后的层上进行等离子体处理。 在高精度电容器电介质上形成金属高精度电容器顶板。