METHOD AND CIRCUITRY FOR ON-CHIP ELECTRO-STATIC DISCHARGE PROTECTION SCHEME FOR LOW COST GATE DRIVER INTEGRATED CIRCUIT
    2.
    发明申请
    METHOD AND CIRCUITRY FOR ON-CHIP ELECTRO-STATIC DISCHARGE PROTECTION SCHEME FOR LOW COST GATE DRIVER INTEGRATED CIRCUIT 审中-公开
    用于低成本门驱动器集成电路的片上电静电放电保护方案的方法和电路

    公开(公告)号:US20160126233A1

    公开(公告)日:2016-05-05

    申请号:US14533432

    申请日:2014-11-05

    Abstract: An apparatus includes an integrated circuit, a plurality of bi-directional pins, and an electro-static discharge (ESD) clamp. The integrated circuit is configured to provide a ground potential. The plurality of bi-directional pins are configured to provide a differential input signal for the integrated circuit. The electro-static discharge (ESD) clamp is coupled between the ground potential and the plurality of bi-directional pins.

    Abstract translation: 一种装置包括集成电路,多个双向引脚和静电放电(ESD)钳位。 集成电路被配置为提供接地电位。 多个双向引脚被配置为提供用于集成电路的差分输入信号。 静电放电(ESD)钳位电极耦合在地电位和多个双向引脚之间。

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