Phase change memory fabricated using self-aligned processing
    6.
    发明授权
    Phase change memory fabricated using self-aligned processing 有权
    使用自对准处理制造的相变存储器

    公开(公告)号:US07362608B2

    公开(公告)日:2008-04-22

    申请号:US11366151

    申请日:2006-03-02

    IPC分类号: G11C11/00

    摘要: A memory includes transistors in rows and columns providing an array, first conductive lines in columns across the array, and second conductive lines encapsulated by dielectric material in rows across the array. Each second conductive line is coupled to one side of the source-drain path of the transistors in each row. The memory includes phase change elements between the second conductive lines and contacting the first conductive lines and self-aligned to the first conductive lines. Each phase change element is coupled to the other side of the source-drain path of a transistor.

    摘要翻译: 存储器包括行和列中提供阵列的晶体管,跨阵列的列中的第一导电线以及跨越阵列的行中的介电材料封装的第二导电线。 每个第二导线与每行中的晶体管的源极 - 漏极路径的一侧耦合。 存储器包括第二导线之间的相变元件,并与第一导线接触并与第一导线自对准。 每个相变元件耦合到晶体管的源 - 漏路径的另一侧。

    INTEGRATED CIRCUIT INCLUDING A MEMORY FABRICATED USING SELF-ALIGNED PROCESSING
    8.
    发明申请
    INTEGRATED CIRCUIT INCLUDING A MEMORY FABRICATED USING SELF-ALIGNED PROCESSING 有权
    集成电路,包括使用自对准处理制成的存储器

    公开(公告)号:US20080142778A1

    公开(公告)日:2008-06-19

    申请号:US12020988

    申请日:2008-01-28

    IPC分类号: H01L45/00

    摘要: An integrated circuit includes transistors in rows and columns providing an array, conductive lines in columns across the array, and resistivity changing material elements contacting the conductive lines and self-aligned to the conductive lines. The integrated circuit includes electrodes contacting the resistivity changing material elements, each electrode self-aligned to a conductive line and coupled to one side of a source-drain path of a transistor.

    摘要翻译: 集成电路包括提供阵列的行和列的晶体管,跨阵列的列中的导电线以及与导电线接触并与导电线自对准的电阻率变化材料元件。 集成电路包括与电阻率变化材料元件接触的电极,每个电极与导电线自对准并且耦合到晶体管的源极 - 漏极路径的一侧。

    Phase change memory fabricated using self-aligned processing
    9.
    发明授权
    Phase change memory fabricated using self-aligned processing 有权
    使用自对准处理制造的相变存储器

    公开(公告)号:US07324365B2

    公开(公告)日:2008-01-29

    申请号:US11366370

    申请日:2006-03-02

    IPC分类号: G11C11/00

    摘要: A memory includes transistors in rows and columns providing an array, conductive lines in columns across the array, and phase change elements contacting the conductive lines and self-aligned to the conductive lines. The memory includes bottom electrodes contacting the phase change elements, each bottom electrode self-aligned to a conductive line and coupled to one side of a source-drain path of a transistor.

    摘要翻译: 存储器包括行和列中提供阵列的晶体管,跨阵列的列中的导线以及接触导线并与导线自对准的相变元件。 存储器包括接触相变元件的底部电极,每个底部电极与导电线自对准并且耦合到晶体管的源极 - 漏极通路的一侧。