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公开(公告)号：US5675803A
公开(公告)日：1997-10-07
申请号：US299720
申请日：1994-09-01
CPC分类号： G06F11/3624 , G06F11/3644
摘要： This Continuation-In-Part describes a part of this run-time debugger operation which is designated the "Fix-and-Continue" invention. This invention permits a user to begin a debugging session wherein if an error in the code is encountered, the user can edit the corresponding source code to correct the error and then execute a "Fix and Continue" command all without leaving the debugging session. The Fix and Continue code calls the compiler to recompile the source code file with the edited text in it, receives the resulting recompiled object code file from the compiler, uses the dynamic linker to link the recompiled object code into the target application program process, patches the previous version of this same object code fie to refer to the newly recompiled code, resets any required variables and registers, resets the program counter to the line of code being executed when the error was discovered. The debugger then continues in the debug session thereby saving the time it would ordinarily take to quit the debug session, relink and reload the target program and start the debug session once again.
摘要翻译： 这个连续部分描述了这个运行时调试器操作的一部分，它被指定为“固定和继续”发明。 本发明允许用户开始调试会话，其中如果遇到代码中的错误，则用户可以编辑相应的源代码以纠正错误，然后在不离开调试会话的情况下执行“修复和继续”命令。 修复和继续代码调用编译器重新编译源代码文件中的编辑文本，从编译器接收生成的重新编译的对象代码文件，使用动态链接器将重新编译的目标代码链接到目标应用程序进程，补丁 以前版本的相同目标代码要引用新重新编译的代码，重置任何所需的变量和寄存器，将程序计数器复位到发现错误时执行的代码行。 然后，调试器在调试会话中继续进行，从而节省了退出调试会话通常需要的时间，重新连接并重新加载目标程序，并再次启动调试会话。
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公开(公告)号：US5313646A
公开(公告)日：1994-05-17
申请号：US714312
申请日：1991-06-10
申请人： David Hendricks , Evan Adams , Tom Lyon , Terrence C. Miller
发明人： David Hendricks , Evan Adams , Tom Lyon , Terrence C. Miller
CPC分类号： G06F17/30955 , G06F17/30235 , Y10S707/99942
摘要： In a computer system having a hierarchical file structure, a file system is provided which permits users of the system to share a file hierarchy and also have a private hierarchy in which files are automatically copied to as they are modified. Through the system of the present invention, a directory appears to the user as a single directory but may actually comprise files originating from a number of directories which are connected to one another through search links. Each directory has a search link associated with it which contains the path name of the back layer or directory behind it. The first layer seen through the system of the present invention is the front layer, private to the user. The back layers behind the front layer and connected to the front layer through the search links are shared layers accessible to multiple users. Thus transparent to the user of the directory accessible comprises multiple layers comprising shared and private files. The system further provides a copy-on-write feature which protects the integrity of the shared files by automatically copying a shared file into the users private layer when the user attempts to modify a shared file in a back layer.
摘要翻译： 在具有分层文件结构的计算机系统中，提供了一种文件系统，其允许系统的用户共享文件层次结构，并且还具有私有层次结构，其中文件在被修改时被自动复制。 通过本发明的系统，用户将目录看作单个目录，但实际上可以包括通过搜索链接彼此连接的多个目录的源文件。 每个目录都有一个与之关联的搜索链接，其中包含后面层或目录后面的路径名。 通过本发明的系统看到的第一层是对用户私有的前层。 前层后面的背层和通过搜索链接连接到前层是多个用户可访问的共享层。 对于可访问目录的用户来说这样透明化包括包括共享和专用文件的多个层。 该系统进一步提供了写时复制功能，当用户尝试修改背层中的共享文件时，通过将共享文件自动复制到用户专用层中来保护共享文件的完整性。
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公开(公告)号：US4718033A
公开(公告)日：1988-01-05
申请号：US750116
申请日：1985-06-28
申请人： Terrence C. Miller
发明人： Terrence C. Miller
CPC分类号： G06F7/494 , G06F2207/4921 , G06F2207/4924 , G06F7/4991
摘要： Apparatus is provided to restore an excess six correct to every digit of an intermediate result which did overflow during the previous addition operation during a sequence of repeated BCD addition operations. A carry register is defined to store and feedback logical signals indicative of the occurance of an overflow event.
摘要翻译： 提供装置以在重复的BCD加法操作的顺序期间，将先前的加法操作中溢出的中间结果的每个数字正确地恢复到过去的六分之一。 定义进位寄存器来存储和反馈指示溢出事件发生的逻辑信号。
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公开(公告)号：US4777589A
公开(公告)日：1988-10-11
申请号：US750578
申请日：1985-06-28
申请人： Steven C. Boettner , William R. Bryg , David V. James , Tso-Kai Liu , Michael J. Mahon , Terrence C. Miller , William S. Worley, Jr.
发明人： Steven C. Boettner , William R. Bryg , David V. James , Tso-Kai Liu , Michael J. Mahon , Terrence C. Miller , William S. Worley, Jr.
CPC分类号： G06F12/1475 , G06F12/0292 , G06F12/0653 , G06F2212/206
摘要： A virtual memory system is used to control access to I/O device address space in accordance with a preferred embodiment of the present invention. In a virtual memory system, access to pages within a processor's address space are assigned to each application program. Each I/O device is assigned two pages of address space. One page is considered to be privileged, and the other unprivileged. Each I/O device register is associated with an address in each of the two pages of its I/O device address space. Address space is global. What is meant by global is that physical memory locations map to the same virtual memory space regardless of what process is running on the processor. Access codes accompanied by a write disable bit are used to control process access to various addresses.
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公开(公告)号：US07558935B1
公开(公告)日：2009-07-07
申请号：US10838603
申请日：2004-05-04
IPC分类号： G06F12/02
CPC分类号： G06F12/023 , G06F8/4441
摘要： Methods, systems, and articles of manufacture consistent with the present invention optimize allocation of items to a stack memory instead of a heap memory. It is determined whether an item to be placed on the heap memory escapes from the scope of the item's allocator, and whether the item survives the item's allocator. The item is allocated to the stack memory responsive to the item not escaping from the scope of the item's allocator and not surviving the item's allocator.
摘要翻译： 与本发明一致的方法，系统和制品将物品的分配优化到堆存储器而不是堆存储器。 确定要放置在堆内存上的项是否从项目的分配器的范围中转义，以及项是否存在项目的分配器。 该项目被分配给堆栈存储器，以响应于不从项目的分配器的范围逃脱的项目，并且不存在项目的分配器。
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公开(公告)号：US6119206A
公开(公告)日：2000-09-12
申请号：US680575
申请日：1996-07-12
CPC分类号： G06F11/3612
摘要： Stack tracebacks are performed in debugging and exception handling routines, and involve providing the values of non-volatile registers at the time of entry into each function in a call chain. One stack traceback technique includes performing the following two steps for each virtual address at which a function call in the call chain is made: (1) locating the tag section whose virtual address range includes the virtual address; and (2) locating a tag in the tag section found in step (1), whose virtual address range includes the virtual address. The tag found in step (2) indicates which of the values, if any, respectively held by the non-volatile registers upon entry to the particular function in which the above function call is made, are stored in a stack frame for the particular function at the time of the function call.
摘要翻译： 堆栈跟踪在调试和异常处理例程中执行，并且涉及在进入呼叫链中的每个功能时提供非易失性寄存器的值。 一种堆栈追溯技术包括对进行呼叫链中的功能调用的每个虚拟地址执行以下两个步骤：（1）定位虚拟地址范围包括虚拟地址的标签段; 以及（2）将标签定位在步骤（1）中找到的标签部分中，其虚拟地址范围包括虚拟地址。 在步骤（2）中找到的标签指示在进入上述功能调用的特定功能时分别由非易失性寄存器保持的值中的哪一个存储在特定功能的堆栈帧中 在函数调用时。
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7.发明授权Method and means for conditional storing of data in a reduced instruction set computer 失效用于在精简指令集计算机中有条件地存储数据的方法和装置
公开(公告)号：US4873627A
公开(公告)日：1989-10-10
申请号：US139508
申请日：1987-12-30
CPC分类号： G06F9/30072 , G06F9/30021
摘要： In a computer device in accordance with the preferred embodiment of the invention, an instruction set which uses a two-instruction sequence to store the result of a comparison is provided. The two-instruction sequence, which uses no branch instructions, does not need to wait for condition resolution before storing conditional results. Additionally, it also is capable of implementing slightly more general operations than simply storing a zero or one value of a comparison. Basically, the instruction set in accordance with the invention compares two operands and unconditionally stores a zero, which represents a Boolean "false", into a selected destination. The instruction set then conditionally nullifies the instruction following it, thus effecting a highly efficient execution of a sequence of instructions compared to the prior art.
摘要翻译： 在根据本发明的优选实施例的计算机设备中，提供了使用两指令序列来存储比较结果的指令集。 不使用分支指令的两个指令序列在存储条件结果之前不需要等待条件解析。 另外，它也可以比简单地存储比较的零或一个值来实现稍微更一般的操作。 基本上，根据本发明的指令集比较两个操作数，并且无条件地将一个表示布尔“假”的零存储到所选择的目的地中。 然后，指令集有条件地使其后的指令无效，从而与现有技术相比，执行指令序列的高效执行。
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8.发明授权Privilege level checking instruction for implementing a secure hierarchical computer system 失效用于实施安全分级计算机系统的权限级别检查指令
公开(公告)号：US4809160A
公开(公告)日：1989-02-28
申请号：US792702
申请日：1985-10-28
CPC分类号： G06F9/468 , G06F9/45537
摘要： A low overhead way for insuring that only routines of sufficient privilege can execute on a secured page of memory in an hierarchial computer system, and for raising the privilege level of a low privilege process in an orderly and secure way is presented. This is done through the execution of a single "gateway" branch instruction standing between a procedure call by a lower privileged routine, such as a user program, and an operating system itself.
摘要翻译： 提供了一种低开销方式，用于确保仅有足够权限的例程可以在分层计算机系统中的存储器的安全页面上执行，并且以有序和安全的方式提高低特权过程的特权级别。 这通过执行站在诸如用户程序的较低特权例程的过程调用与操作系统本身之间的单个“网关”分支指令来完成。
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9.发明授权Mechanism for comparing two registers and storing the result in a general purpose register without requiring a branch 失效用于比较两个寄存器并将结果存储在通用寄存器中而不需要分支的机制
公开(公告)号：US4747046A
公开(公告)日：1988-05-24
申请号：US750809
申请日：1985-06-28
CPC分类号： G06F9/30072 , G06F9/30021
摘要： In a computer device, an instruction set which uses a two-instruction sequence to store the result of a comparison is provided. The two-instruction sequence, which uses no branch instructions, does not need to wait for condition resolution before storing conditional results. Additionally, it also is capable of implementing slightly more general operations than simply storing a zero or one value of a comparison. Basically, the instruction set in accordance with the invention compares two operands and unconditionally stores a zero, which represents a Boolean "false", into a selected destination. The instruction set then conditionally nullifies the instruction following it, thus effecting a highly efficient execution of a sequence of instructions compared to the prior art.
摘要翻译： 在计算机装置中，提供了使用两指令序列来存储比较结果的指令集。 不使用分支指令的两个指令序列在存储条件结果之前不需要等待条件解析。 另外，它也可以比简单地存储比较的零或一个值来实现稍微更一般的操作。 基本上，根据本发明的指令集比较两个操作数，并且无条件地将一个表示布尔“假”的零存储到所选择的目的地中。 然后，指令集有条件地使其后的指令无效，从而与现有技术相比，执行指令序列的高效执行。
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