Apparatus for filtering inter-node communication in a data processing system
    2.
    发明授权
    Apparatus for filtering inter-node communication in a data processing system 失效
    用于在数据处理系统中过滤节点间通信的装置

    公开(公告)号:US07088715B2

    公开(公告)日:2006-08-08

    申请号:US10933598

    申请日:2004-09-03

    IPC分类号: H04L12/28

    CPC分类号: H04L49/351 H04L49/3009

    摘要: A method and system for communication in a system area network (SAN) data processing system are described. The SAN includes a plurality of interconnected nodes that each have at least one port for communication. To avoid communication-induced errors that may arise, for example, if multiple nodes share the same node ID, the port of a node in the SAN is marked as “fenced” to prevent transmission of packets of a first traffic type while permitting transmission of packets of a second traffic type. The marking of the port may be recorded, for example, in a configuration register of the port. While the port is fenced, only packets of other than the first traffic type are routed via the port. In one preferred embodiment, the second traffic type represents SAN configuration traffic, and the first traffic type represents non-configuration traffic. In this preferred embodiment, the marking of the port may be removed following communication of configuration traffic utilized to negotiate unique node ID throughout the SAN.

    摘要翻译: 描述了系统区域网(SAN)数据处理系统中的通信方法和系统。 SAN包括多个互连的节点,每个节点具有至少一个用于通信的端口。 为了避免可能出现的通信引起的错误,例如,如果多个节点共享相同的节点ID,则SAN中的节点的端口被标记为“围栏”,以防止第一业务类型的分组的传输,同时允许 第二种流量类型的数据包。 端口的标记可以记录在例如端口的配置寄存器中。 当端口被隔离时,只有除第一个流量类型之外的数据包通过端口路由。 在一个优选实施例中,第二流量类型表示SAN配置流量,第一流量类型表示非配置流量。 在该优选实施例中,可以在通过用于在整个SAN中协商唯一节点ID的配置流量通信之后去除端口的标记。

    Apparatus for filtering inter-node communication in a data processing system
    3.
    发明授权
    Apparatus for filtering inter-node communication in a data processing system 失效
    用于在数据处理系统中过滤节点间通信的装置

    公开(公告)号:US06944155B2

    公开(公告)日:2005-09-13

    申请号:US09800398

    申请日:2001-03-05

    IPC分类号: H04L12/56 H04L12/28

    CPC分类号: H04L49/351 H04L49/3009

    摘要: A method and system for communication in a system area network (SAN) data processing system are described. The SAN includes a plurality of interconnected nodes that each have at least one port for communication. To avoid communication-induced errors that may arise, for example, if multiple nodes share the same node ID, the port of a node in the SAN is marked as “fenced” to prevent transmission of packets of a first traffic type while permitting transmission of packets of a second traffic type. The marking of the port may be recorded, for example, in a configuration register of the port. While the port is fenced, only packets of other than the first traffic type are routed via the port. In one preferred embodiment, the second traffic type represents SAN configuration traffic, and the first traffic type represents non-configuration traffic. In this preferred embodiment, the marking of the port may be removed following communication of configuration traffic utilized to negotiate unique node ID throughout the SAN.

    摘要翻译: 描述了系统区域网(SAN)数据处理系统中的通信方法和系统。 SAN包括多个互连的节点,每个节点具有至少一个用于通信的端口。 为了避免可能出现的通信引起的错误,例如,如果多个节点共享相同的节点ID,则SAN中的节点的端口被标记为“围栏”,以防止第一业务类型的分组的传输,同时允许 第二种流量类型的数据包。 端口的标记可以记录在例如端口的配置寄存器中。 当端口被隔离时,只有除第一个流量类型之外的数据包通过端口路由。 在一个优选实施例中,第二流量类型表示SAN配置流量,第一流量类型表示非配置流量。 在该优选实施例中,可以在通过用于在整个SAN中协商唯一节点ID的配置流量通信之后去除端口的标记。

    Primitive communication mechanism for adjacent nodes in a clustered computer system
    4.
    发明授权
    Primitive communication mechanism for adjacent nodes in a clustered computer system 有权
    集群计算机系统中相邻节点的原始通信机制

    公开(公告)号:US07197536B2

    公开(公告)日:2007-03-27

    申请号:US09845933

    申请日:2001-04-30

    IPC分类号: G06F15/16 H04Q11/00

    摘要: A circuit arrangement, node, clustered computer system, and method incorporate a primitive communication mechanism for use in exchanging data between adjacent nodes coupled via a point-to-point network. A plurality of network ports are used to couple a node to other nodes in the clustered computer system over point-to-point network interconnects, and a plurality of communication registers are associated with each of the network ports for the purpose of storing data received through their associated network ports. A node desiring to communicate information to another node receives a port identifier from the other node that identifies the network port on the other node through which the pair of nodes are coupled. The port identifier is then used by the node to communicate data to the other node through the use of one or more write operations directed to the communication register on the other node that is associated with the network port identified by the port identifier. On the other node, a control circuit is used to automatically notify the other node whenever data is stored in any of its communication registers, e.g., by generating an interrupt in response to non-zero data being stored in any of such communication registers.

    摘要翻译: 电路布置,节点,集群计算机系统和方法包含用于在经由点对点网络耦合的相邻节点之间交换数据的原始通信机制。 多个网络端口用于通过点对点网络互连将节点耦合到群集计算机系统中的其他节点,并且多个通信寄存器与每个网络端口相关联,用于存储通过 其关联的网络端口。 希望向另一节点传送信息的节点从另一个节点接收一个端口标识符,该端口标识通过该对节点耦合的另一个节点上的网络端口。 然后端口标识符被节点用于通过使用针对与由端口标识符标识的网络端口相关联的另一节点上的通信寄存器的一个或多个写入操作来向另一个节点传送数据。 在另一节点上,当数据存储在其任何通信寄存器中时,例如通过响应于非零数据被存储在任何这样的通信寄存器中而产生中断,控制电路被用于自动通知另一个节点。

    Atomic ownership change operation for input/output (I/O) bridge device in clustered computer system
    5.
    发明授权
    Atomic ownership change operation for input/output (I/O) bridge device in clustered computer system 失效
    集群计算机系统中输入/输出(I / O)桥接器件的原子所有权更改操作

    公开(公告)号:US06754753B2

    公开(公告)日:2004-06-22

    申请号:US09844584

    申请日:2001-04-27

    IPC分类号: G06F1516

    CPC分类号: G06F9/52

    摘要: A clustered computer system, bridge device and method include support for an atomic ownership change operation that ensures orderly and reliable ownership management of an input/output (I/O) bridge device. A lock indicator is associated with a bridge device, and is used to indicate a “locked” or “unlocked” status of the bridge device. Whenever the lock indicator indicates that the bridge device is unlocked, an atomic operation such as a read request to a lock indicator register is utilized to both set the indicator to indicate a locked status for the bridge device, and to associate the bridge device with a source node that initiated the atomic operation. In connection with the lock indicator, write access to one or more configuration parameter registers is controlled such that only the node that is associated with the bridge device is permitted to update such configuration parameter registers.

    摘要翻译: 集群计算机系统,桥接器件和方法包括支持原子所有权更改操作,确保输入/输出(I / O)桥接器件的有序可靠的所有权管理。 锁定指示器与桥接设备相关联,并用于指示桥接设备的“锁定”或“解锁”状态。 每当锁定指示器指示桥接设备被解锁时,利用诸如对锁定指示器寄存器的读取请求的原子操作来将指示器设置为指示桥接设备的锁定状态,并且将桥接设备与 源节点启动原子操作。 与锁定指示器相关联,控制对一个或多个配置参数寄存器的写入访问,使得仅允许与桥接设备相关联的节点更新这样的配置参数寄存器。

    Interrupt handlers used in different modes of operations
    6.
    发明授权
    Interrupt handlers used in different modes of operations 失效
    中断处理程序用于不同的操作模式

    公开(公告)号:US06772259B2

    公开(公告)日:2004-08-03

    申请号:US09952852

    申请日:2001-09-12

    IPC分类号: G06F1324

    CPC分类号: G06F9/4812 G06F13/24

    摘要: According to the present invention, when an interrupt occurs in a computer system running an operating system, control takes a separate code path in the operating system, depending on whether the computer system is in non-partitioned mode or partitioned mode, before converging to a common mode-independent interrupt handler that services the interrupt. Along each separate code path, hardware state of the computer system which is relevant to the processing of the interrupt is changed to a consistent hardware state so that the common mode-independent interrupt handler can run properly in both modes.

    摘要翻译: 根据本发明,当在运行操作系统的计算机系统中发生中断时,根据计算机系统是否处于非分区模式或分区模式,控制在操作系统中采用单独的代码路径,然后收敛到 共模独立的中断处理程序服务于中断。 沿着每个单独的代码路径,与处理中断相关的计算机系统的硬件状态被改变为一致的硬件状态,使得共模独立的中断处理程序能够以两种模式正常运行。

    Processor with compiler-allocated, variable length intermediate storage
    7.
    发明授权
    Processor with compiler-allocated, variable length intermediate storage 失效
    具有编译器分配,可变长度中间存储的处理器

    公开(公告)号:US5860138A

    公开(公告)日:1999-01-12

    申请号:US537556

    申请日:1995-10-02

    CPC分类号: G06F9/3013 G06F9/35 G06F9/383

    摘要: A processor includes an alias unit having high-speed memory storage locations allocated at compile time for variable-sized data objects. The storage locations are accessed through a table of alias entries that consist of a base address in the processor memory to which the alias entry is aliased, the number of bytes in the alias entry, and a base address that points to the first byte of alias buffer memory representing the value of the alias entry. Each alias entry is given a unique name from a small name space that is encoded into relevant machine opcodes. The names are used to reference the data objects. The processor can optionally include a data cache and can be used in either single processor or multi-tasking environments. Reference to a memory location address associated with an alias register entry would be redirected to the intermediate storage.

    摘要翻译: 处理器包括具有在编译时分配用于可变大小的数据对象的高速存储器存储位置的别名单元。 存储位置通过别名条目的表进行访问,该表由处理器存储器中的别名条目别名的基地址,别名条目中的字节数和指向别名的第一个字节的基址组成 表示别名条目值的缓冲存储器。 每个别名条目都从一个小的名称空间中被赋予一个唯一的名称,该名称空间被编码到相关的机器操作码中。 这些名称用于引用数据对象。 处理器可以可选地包括数据高速缓存,并且可以在单处理器或多任务环境中使用。 对与别名寄存器条目相关联的存储器位置地址的引用将被重定向到中间存储器。

    Logical memory tags for redirected DMA operations
    8.
    发明授权
    Logical memory tags for redirected DMA operations 失效
    用于重定向DMA操作的逻辑内存标记

    公开(公告)号:US07130982B2

    公开(公告)日:2006-10-31

    申请号:US10815234

    申请日:2004-03-31

    IPC分类号: G06F12/00

    CPC分类号: G06F12/109 G06F13/28

    摘要: A memory tag mechanism creates a logical memory tag of a first length that corresponds to an I/O address of a second length. The memory tag is “logical” because it does not represent physical memory. When an I/O adapter device driver that expects an address of the first length is invoked, the memory tag is passed. When the I/O adapter device driver makes a call to the partition manager to convert the address of the first length (i.e., memory tag) to an I/O address of the second length, the partition manager detects that the passed address is a memory tag instead of a real address, and returns the corresponding I/O address. In this manner existing device drivers that expect addresses of the first length may be used for redirected DMA, which allows performing DMA operations directly from a shared I/O adapter in a hosting partition to memory in a hosted partition.

    摘要翻译: 存储器标签机制创建对应于第二长度的I / O地址的第一长度的逻辑存储器标签。 内存标签是“逻辑”,因为它不代表物理内存。 当调用期望第一个长度的地址的I / O适配器设备驱动程序时,会传递内存标签。 当I / O适配器设备驱动程序调用分区管理器将第一个长度的地址(即,存储器标签)转换为第二个长度的I / O地址时,分区管理器检测到传递的地址是 存储器标签而不是真实地址,并返回相应的I / O地址。 以这种方式,期望第一长度的地址的现有设备驱动器可以用于重定向DMA,其允许直接从托管分区中的共享I / O适配器执行DMA操作到托管分区中的存储器。