In-situ pad conditioning process for CMP
    1.
    发明授权
    In-situ pad conditioning process for CMP 有权
    CMP原位垫调理工艺

    公开(公告)号:US6022266A

    公开(公告)日:2000-02-08

    申请号:US169382

    申请日:1998-10-09

    CPC分类号: B24B53/017 B24B37/042

    摘要: An improved method of in-situ conditioning of a polishing pad for use with a stationary pad conditioner during chemical mechanical polishing is described. A polishing table having a polishing pad on its surface is rotated in a first direction during polishing of a semiconductor wafer. A polishing pad conditioner is adjustably attached to the rotating polishing table such that the conditioner is stationary in relation to the rotating polishing table. The conditioner has a roughened surface which is in contact with the polishing pad providing in-situ conditioning during polishing of a semiconductor wafer. After polishing of the semiconductor wafer, the polishing table is rotated in a second direction while the conditioner is still in contact with polishing pad. Rotating the polishing pad in a second direction dislodges the polishing debris clogging the roughened surface of the conditioner and redistributes CMP slurry. The roughened surface of the pad conditioner is refreshed allowing more effective conditioning of the polishing pad. Pad life is prolonged, polishing is stabilized, and the polish cycle time is reduced.

    摘要翻译: 描述了在化学机械抛光期间用于与固定衬垫调节器一起使用的抛光垫的现场调节的改进方法。 在半导体晶片的研磨过程中,在其表面上具有抛光垫的抛光台在第一方向上旋转。 抛光垫调节器可调节地附接到旋转的抛光台,使得调节器相对于旋转的抛光台静止。 调理剂具有与抛光垫接触的粗糙表面,在抛光半导体晶片期间提供原位调节。 在抛光半导体晶片之后,抛光台在第二方向旋转,同时调节器仍然与抛光垫接触。 在第二个方向上旋转抛光垫将抛光碎屑堵塞在调理剂的粗糙表面上并重新分布CMP浆料。 擦洗垫调节剂的粗糙表面被刷新,从而可以更有效地调理抛光垫。 焊垫寿命延长,抛光稳定,抛光周期缩短。

    Method of forming a low stress polycide conductors on a semiconductor
chip
    2.
    发明授权
    Method of forming a low stress polycide conductors on a semiconductor chip 失效
    在半导体芯片上形成低应力多晶硅导体的方法

    公开(公告)号:US5849629A

    公开(公告)日:1998-12-15

    申请号:US551092

    申请日:1995-10-31

    摘要: A method of forming low resistivity conductive lines on a semiconductor substrate is disclosed. In practicing the method a multichamber tool is used to advantage by forming a first doped polysilicon layer on the surface of a substrate, forming a second undoped layer on the doped layer, while maintaining the work piece under a vacuum environment, moving the substrate to a second chamber and thereafter forming a silicide containing layer on the undoped polysilicon layer. Various techniques may be used to deposit either the polysilicon or the silicide layer such as sputtering may also be used. Practice of the method eliminates separation of silicide from polysilicon and increases product yield.

    摘要翻译: 公开了一种在半导体衬底上形成低电阻率导电线的方法。 在实施该方法中,通过在衬底的表面上形成第一掺杂多晶硅层,在掺杂层上形成第二未掺杂层,同时将工件保持在真空环境下,将衬底移动到 然后在未掺杂的多晶硅层上形成含硅化物层。 也可以使用各种技术来沉积多晶硅或硅化物层,例如溅射。 该方法的实践消除了硅化物与多晶硅的分离并提高了产品产率。

    Integrated wafer cassette metrology assembly
    3.
    发明授权
    Integrated wafer cassette metrology assembly 失效
    集成晶圆盒计量组件

    公开(公告)号:US06738142B2

    公开(公告)日:2004-05-18

    申请号:US09794335

    申请日:2001-02-28

    IPC分类号: G01N2155

    CPC分类号: H01L21/67242

    摘要: An apparatus with one or more dimensions conforming to a wafer storage cassette used in semiconductor manufacturing which contains all or part of a sensor designed to measure a parameter of a wafer placed into the cassette. The intended use of the apparatus is in a process tool location normally occupied by a standard wafer cassette. By integrating all or part of the sensor into standard wafer storage cassette, a solution is provided whereby the same cassette and metrology system can be mechanically integrated into many process tools.

    摘要翻译: 具有符合半导体制造中使用的晶片存储盒的一个或多个维度的装置,其包含设计成测量放置在盒中的晶片的参数的全部或部分传感器。 设备的预期用途在通常由标准晶片盒占据的处理工具位置。 通过将全部或部分传感器集成到标准晶片存储盒中,提供了一种解决方案,可将相同的盒式计量系统机械地集成到许多工艺工具中。