KStore data simulator directives and values processor process and files
    2.
    发明授权
    KStore data simulator directives and values processor process and files 有权
    KStore数据模拟器指令和值处理器进程和文件

    公开(公告)号:US08250116B2

    公开(公告)日:2012-08-21

    申请号:US12319037

    申请日:2008-12-31

    IPC分类号: G06F17/30

    CPC分类号: G06Q10/04

    摘要: A data simulator receives a set of directives specified in a file and creates one or more datastreams from which a data structure may be built as specified by the directives. The directives may specify configuration settings, constants, changing fields, values and probabilities.

    摘要翻译: 数据模拟器接收在文件中指定的一组指令,并创建一个或多个数据流,根据指令可以从中构建数据结构。 指令可以指定配置设置,常量,更改字段,值和概率。

    Integrated circuit having a top side wafer contact and a method of manufacture therefor
    3.
    发明申请
    Integrated circuit having a top side wafer contact and a method of manufacture therefor 有权
    具有顶侧晶片接触的集成电路及其制造方法

    公开(公告)号:US20070029611A1

    公开(公告)日:2007-02-08

    申请号:US11195283

    申请日:2005-08-02

    IPC分类号: H01L21/84 H01L27/12

    摘要: The present invention provides an integrated circuit and a method of manufacture therefore. The integrated circuit (100, 1000), in one embodiment without limitation, includes a dielectric layer (120, 1020) located over a wafer substrate (110, 1010), and a semiconductor substrate (130, 1030) located over the dielectric layer (120, 1020), the semiconductor substrate (130, 1030) having one or more transistor devices (140, 1040) located therein or thereon. The integrated circuit (100, 1000) may further include an interconnect (170, 1053) extending entirely through the semiconductor substrate (130, 1030) and the dielectric layer (120, 1020), thereby electrically contacting the wafer substrate (110, 1010).

    摘要翻译: 因此,本发明提供一种集成电路及其制造方法。 在一个实施例中,集成电路(100,1000)没有限制地包括位于晶片衬底(110,1010)之上的电介质层(120,1020),以及位于介电层上的半导体衬底(130,1030) 120,120),具有位于其中或其上的一个或多个晶体管器件(140,1040)的半导体衬底(130,1030)。 集成电路(100,1000)还可以包括完全延伸穿过半导体衬底(130,1030)和介电层(120,1020)的互连(170,1053),从而与晶片衬底(110,1010)电接触, 。

    Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor
    5.
    发明申请
    Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor 有权
    具有晶体管级顶侧晶片接点的集成电路及其制造方法

    公开(公告)号:US20070045732A1

    公开(公告)日:2007-03-01

    申请号:US11196087

    申请日:2005-08-03

    IPC分类号: H01L27/12

    摘要: The present invention provides an integrated circuit and a method of manufacture therefor. The integrated circuit (100), in one embodiment without limitation, includes a dielectric layer (120) located over a wafer substrate (110), and a semiconductor substrate (130) located over the dielectric layer (120), the semiconductor substrate (130) having one or more transistor devices (160) located therein or thereon. The integrated circuit (100) may further include an interconnect (180) extending entirely through the semiconductor substrate (130) and the dielectric layer (120), thereby electrically contacting the wafer substrate (110), and one or more isolation structures (150) extending entirely through the semiconductor substrate (130) to the dielectric layer (120).

    摘要翻译: 本发明提供一种集成电路及其制造方法。 在一个实施例中,集成电路(100)在没有限制的情况下包括位于晶片衬底(110)之上的电介质层(120)和位于电介质层(120)上的半导体衬底(130),半导体衬底 )具有位于其中或其上的一个或多个晶体管器件(160)。 集成电路(100)还可以包括完全延伸穿过半导体衬底(130)和电介质层(120)的互连(180),从而电接触晶片衬底(110)和一个或多个隔离结构(150) 完全延伸穿过半导体衬底(130)到介电层(120)。

    Method for analyzing critical defects in analog integrated circuits
    6.
    发明申请
    Method for analyzing critical defects in analog integrated circuits 有权
    分析模拟集成电路关键缺陷的方法

    公开(公告)号:US20060171221A1

    公开(公告)日:2006-08-03

    申请号:US11048027

    申请日:2005-01-31

    IPC分类号: G11C29/00

    CPC分类号: G01R31/2894 G01R31/311

    摘要: The present invention provides a method for analyzing critical defects in analog integrated circuits. The method for analyzing critical defects, among other possible steps, may include fault testing a power field effect transistor (120) portion of an analog integrated circuit (115) to obtain electrical failure data. The method may further include performing an in-line optical inspection of the analog integrated circuit (115) to obtain physical defect data, and correlating the electrical failure data and physical defect data to analyze critical defects.

    摘要翻译: 本发明提供了一种用于分析模拟集成电路中的关键缺陷的方法。 用于分析关键缺陷的方法以及其他可能的步骤可以包括对模拟集成电路(115)的功率场效应晶体管(120)部分进行故障测试以获得电气故障数据。 该方法还可以包括执行模拟集成电路(115)的在线光学检查以获得物理缺陷数据,以及将电故障数据和物理缺陷数据相关联以分析关键缺陷。

    Dual metal schottky diode
    7.
    发明申请
    Dual metal schottky diode 有权
    双金属肖特基二极管

    公开(公告)号:US20050221571A1

    公开(公告)日:2005-10-06

    申请号:US10814673

    申请日:2004-03-30

    摘要: An embodiment of the invention is a Schottky diode 22 having a semiconductor substrate 3, a first metal 24, a barrier layer 26, and second metal 28. Another embodiment of the invention is a method of manufacturing a Schottky diode 22 that includes providing a semiconductor substrate 3, forming a barrier layer 26 over the semiconductor substrate 3, forming a first metal layer 23 over the semiconductor substrate 3, annealing the semiconductor substrate 3 to form areas 24 of reacted first metal and areas 23 of un-reacted first metal, and removing selected areas 23 of the un-reacted first metal. The method further includes forming a second metal layer 30 over the semiconductor substrate 3 and annealing the semiconductor substrate 3 to form areas 28 of reacted second metal and areas 30 of un-reacted second metal

    摘要翻译: 本发明的实施例是具有半导体衬底3,第一金属24,阻挡层26和第二金属28的肖特基二极管22。 本发明的另一实施例是制造肖特基二极管22的方法,其包括提供半导体衬底3,在半导体衬底3上形成阻挡层26,在半导体衬底3上方形成第一金属层23,退火半导体衬底3 以形成反应的第一金属的区域24和未反应的第一金属的区域23,并且去除未反应的第一金属的选定区域23。 该方法还包括在半导体衬底3上形成第二金属层30并退火半导体衬底3以形成反应的第二金属的区域28和未反应的第二金属的区域30

    Kstore scenario simulator processor and XML file
    8.
    发明授权
    Kstore scenario simulator processor and XML file 有权
    Kstore场景模拟器处理器和XML文件

    公开(公告)号:US08010572B1

    公开(公告)日:2011-08-30

    申请号:US11985623

    申请日:2007-11-16

    IPC分类号: G06F17/30

    CPC分类号: G06F17/5009 G06F17/30327

    摘要: A scenario simulator processor receives a declarative file and invokes one or more data simulators to create one or more datastreams from a data structure may be built as specified by the declarative file. The declarative file may specify one or more scenario names, and a set of information corresponding to the one or more scenarios (one set for each scenario). Each set of scenario information includes one or more of the following pieces of information: parameters and settings for the data simulator and the number of threads to be started for each data simulator invoked.

    摘要翻译: 场景模拟器处理器接收声明性文件并且调用一个或多个数据模拟器以从数据结构创建一个或多个数据流可以由声明性文件指定。 声明性文件可以指定一个或多个方案名称,以及与一个或多个方案对应的一组信息(每个方案一个集合)。 每组情景信息包括以下信息中的一个或多个:数据模拟器的参数和设置以及为每个数据模拟器启动的线程数。

    Kstore data simulator directives and values processor process and files
    9.
    发明申请
    Kstore data simulator directives and values processor process and files 有权
    Kstore数据模拟器指令和值处理器进程和文件

    公开(公告)号:US20100169384A1

    公开(公告)日:2010-07-01

    申请号:US12319037

    申请日:2008-12-31

    IPC分类号: G06F17/30 G06F7/00

    CPC分类号: G06Q10/04

    摘要: A data simulator receives a set of directives specified in a file and creates one or more datastreams from which a data structure may be built as specified by the directives. The directives may specify configuration settings, constants, changing fields, values and probabilities.

    摘要翻译: 数据模拟器接收在文件中指定的一组指令,并创建一个或多个数据流,根据指令可以从中构建数据结构。 指令可以指定配置设置,常量,更改字段,值和概率。

    Kstore event manager using triggers for K
    10.
    发明申请
    Kstore event manager using triggers for K 审中-公开
    Kstore事件管理器使用K的触发器

    公开(公告)号:US20100169370A1

    公开(公告)日:2010-07-01

    申请号:US12317979

    申请日:2008-12-31

    IPC分类号: G06F7/00 G06F9/54 G06F17/30

    CPC分类号: G06F9/542 G06F16/2246

    摘要: The KStore or K is a datastore made up of a forest of interconnected, highly unconventional trees of one or more levels. A KStore event manager monitors events and polls for KStore state. When triggered by user-defined conditions or receiving notification that a specified event has occurred, a specified response can be executed. An event/condition/response is defined through a KStore event wizard. When a triggering condition is detected or a notification of an event is received, a user-defined action or sequence of actions is performed automatically, without further user interaction.

    摘要翻译: KStore或K是由一个或多个相互关联的,非常非常规的树木组成的数据库。 KStore事件管理器监视KStore状态的事件和投票。 当由用户定义的条件触发或接收到指定事件发生的通知时,可以执行指定的响应。 事件/条件/响应通过KStore事件向导进行定义。 当检测到触发条件或接收到事件的通知时,自动执行用户定义的动作或动作序列,而无需进一步的用户交互。