公开(公告)号：US07570114B2

公开(公告)日：2009-08-04

申请号：US11880989

申请日：2007-07-24

申请人： Tomas Tansley ,  Gavin Cosgrave

发明人： Tomas Tansley ,  Gavin Cosgrave

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F3/45085 ,  H03F3/45968 ,  H03F2203/45048 ,  H03F2203/45356 ,  H03F2203/45392 ,  H03F2203/45394 ,  H03F2203/45588 ,  H03F2203/45681 ,  H03F2203/45726

摘要： A common mode rejection calibration scheme for use with a difference amplifier having an associated signal path. A signal is generated which varies with the common mode voltage of the differential input voltage applied to the amplifier. This signal is scaled and coupled into the signal path such that the scaled signal reduces the common-mode error that would otherwise be present in the difference amplifier's output.

摘要翻译： 一种与具有相关信号路径的差分放大器一起使用的共模抑制校准方案。 产生随着施加到放大器的差分输入电压的共模电压而变化的信号。 该信号被缩放并耦合到信号路径中，使得缩放的信号降低否则将存在于差分放大器的输出中的共模误差。

公开(公告)号：US20090027125A1

公开(公告)日：2009-01-29

申请号：US11880989

申请日：2007-07-24

申请人： Tomas Tansley ,  Gavin Cosgrave

发明人： Tomas Tansley ,  Gavin Cosgrave

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F3/45085 ,  H03F3/45968 ,  H03F2203/45048 ,  H03F2203/45356 ,  H03F2203/45392 ,  H03F2203/45394 ,  H03F2203/45588 ,  H03F2203/45681 ,  H03F2203/45726

摘要： A common mode rejection calibration scheme for use with a difference amplifier having an associated signal path. A signal is generated which varies with the common mode voltage of the differential input voltage applied to the amplifier. This signal is scaled and coupled into the signal path such that the scaled signal reduces the common-mode error that would otherwise be present in the difference amplifier's output.

公开(公告)号：US07890787B2

公开(公告)日：2011-02-15

申请号：US11453684

申请日：2006-06-15

申请人： Shaun Bradley ,  Kieran Heffernan ,  Tomas Tansley ,  Yang Ling

发明人： Shaun Bradley ,  Kieran Heffernan ,  Tomas Tansley ,  Yang Ling

IPC分类号： G06F1/12

CPC分类号： H04L7/0004 ,  G06F1/04 ,  H03L1/00 ,  H03L7/00

摘要： A microprocessor programmable clock calibration device compares, in response to a calibration command from a programmable processor, turns on a normally off reference oscillator clock, compares the frequency of the reference oscillator clock with the frequency of a calibratable oscillator clock, turns off the reference oscillator clock and adjusts, in response to a difference in those frequencies, the frequency of the calibratable oscillator clock towards that of the reference oscillator clock.

摘要翻译： 微处理器可编程时钟校准装置响应来自可编程处理器的校准命令来比较正常关断参考振荡器时钟，将参考振荡器时钟的频率与可校准振荡器时钟的频率进行比较，将参考振荡器 响应于这些频率的差异，可调整校准振荡器时钟频率与参考振荡器时钟的频率。

公开(公告)号：US07834792B2

公开(公告)日：2010-11-16

申请号：US11453686

申请日：2006-06-15

申请人： Adrian Sherry ,  Tomas Tansley

发明人： Adrian Sherry ,  Tomas Tansley

IPC分类号： H03M1/48

CPC分类号： H03M1/0624 ,  H03M1/0617 ,  H03M1/12

摘要： Synchronous analog to digital conversion including providing a voltage analog to digital converter and a current analog to digital converter, synchronizing the converters, providing a signal conditioning circuit associated with the input of each converter, providing a current input to one of the signal conditioning currents and a voltage input to the other; and processing the inputs with gains differing by substantially an order of magnitude with substantially balanced time delays; and providing those conditioned inputs to the associated converters.

摘要翻译： 同步模数转换，包括提供电压模数转换器和电流模数转换器，同步转换器，提供与每个转换器的输入相关联的信号调理电路，向电信号调节电流之一提供电流输入， 电压输入到另一个; 以及以大致平衡的时间延迟大致一个数量级的增益来处理所述输入; 并向关联的转换器提供这些调节的输入。

公开(公告)号：US20090115522A1

公开(公告)日：2009-05-07

申请号：US12283511

申请日：2008-09-12

申请人： Colin G. Lyden ,  Christian S. Birk ,  Tomas Tansley

发明人： Colin G. Lyden ,  Christian S. Birk ,  Tomas Tansley

IPC分类号： H03F3/45 ,  H03F1/38

CPC分类号： H03F3/387 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2203/45134 ,  H03F2203/45521 ,  H03F2203/45526

摘要： A low power, low noise amplifier system includes at least one amplifier having first and second differential input terminals, first and second differential output terminals and providing a differential output; first and second input capacitors interconnected with the first and second differential amplifier input terminals; first and second feedback circuits containing first and second feedback capacitors, respectively, interconnected with the amplifier differential input and output terminals; an input chopper switch circuit for receiving a low frequency differential input and selectively, alternately swapping those low frequency differential inputs through the input capacitors to the differential input terminals of the amplifier; an output chopper switch for receiving and selectively, alternately swapping the amplifier differential outputs synchronously with the input chopper switch circuit; and a low pass filter responsive to the swapped differential outputs for providing a low noise, low power amplification of the low frequency differential inputs.

摘要翻译： 低功率，低噪声放大器系统包括至少一个具有第一和第二差分输入端的放大器，第一和第二差分输出端并提供差分输出; 与第一和第二差分放大器输入端互连的第一和第二输入电容器; 分别包含与放大器差分输入和输出端互连的第一和第二反馈电容器的第一和第二反馈电路; 输入斩波器开关电路，用于接收低频差分输入并选择性地交替地将那些通过输入电容器的低频差分输入交换到放大器的差分输入端; 输出斩波开关，用于接收并选择性地与输入斩波开关电路同步地交替地交换放大器差分输出; 以及响应于交换的差分输出的低通滤波器，用于提供低频差分输入的低噪声，低功率放大。

公开(公告)号：US07795960B2

公开(公告)日：2010-09-14

申请号：US12283511

申请日：2008-09-12

申请人： Colin G. Lyden ,  Christian S. Birk ,  Tomas Tansley

发明人： Colin G. Lyden ,  Christian S. Birk ,  Tomas Tansley

IPC分类号： H03F1/02

CPC分类号： H03F3/387 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2203/45134 ,  H03F2203/45521 ,  H03F2203/45526

摘要： A low power, low noise amplifier system includes at least one amplifier having first and second differential input terminals, first and second differential output terminals and providing a differential output; first and second input capacitors interconnected with the first and second differential amplifier input terminals; first and second feedback circuits containing first and second feedback capacitors, respectively, interconnected with the amplifier differential input and output terminals; an input chopper switch circuit for receiving a low frequency differential input and selectively, alternately swapping those low frequency differential inputs through the input capacitors to the differential input terminals of the amplifier; an output chopper switch for receiving and selectively, alternately swapping the amplifier differential outputs synchronously with the input chopper switch circuit; and a low pass filter responsive to the swapped differential outputs for providing a low noise, low power amplification of the low frequency differential inputs.

摘要翻译： 低功率，低噪声放大器系统包括至少一个具有第一和第二差分输入端的放大器，第一和第二差分输出端并提供差分输出; 与第一和第二差分放大器输入端互连的第一和第二输入电容器; 分别包含与放大器差分输入和输出端互连的第一和第二反馈电容器的第一和第二反馈电路; 输入斩波器开关电路，用于接收低频差分输入并选择性地交替地将那些通过输入电容器的低频差分输入交换到放大器的差分输入端; 输出斩波开关，用于接收并选择性地与输入斩波开关电路同步地交替地交换放大器差分输出; 以及响应于交换的差分输出的低通滤波器，用于提供低频差分输入的低噪声，低功率放大。

公开(公告)号：US20060290556A1

公开(公告)日：2006-12-28

申请号：US11453686

申请日：2006-06-15

申请人： Adrian Sherry ,  Tomas Tansley

发明人： Adrian Sherry ,  Tomas Tansley

IPC分类号： H03M1/12

CPC分类号： H03M1/0624 ,  H03M1/0617 ,  H03M1/12

摘要： Synchronous analog to digital conversion including providing a voltage analog to digital converter and a current analog to digital converter, synchronizing the converters, providing a signal conditioning circuit associated with the input of each converter, providing a current input to one of the signal conditioning currents and a voltage input to the other; and processing the inputs with gains differing by substantially an order of magnitude with substantially balanced time delays; and providing those conditioned inputs to the associated converters.

摘要翻译： 同步模数转换，包括提供电压模数转换器和电流模数转换器，同步转换器，提供与每个转换器的输入相关联的信号调理电路，向电信号调节电流之一提供电流输入， 电压输入到另一个; 以及以大致平衡的时间延迟大致一个数量级的增益来处理所述输入; 并向关联的转换器提供这些调节的输入。

公开(公告)号：US20050156769A1

公开(公告)日：2005-07-21

申请号：US11005126

申请日：2004-12-06

申请人： John O'Dowd ,  Thomas Meany ,  Tomas Tansley

发明人： John O'Dowd ,  Thomas Meany ,  Tomas Tansley

IPC分类号： H03M3/00 ,  H03M1/12

CPC分类号： H03M3/34 ,  H03M3/458

摘要： A reduced chop rate analog to digital converter technique including selectively weighting input samples to a digital filter, alternately inverting the polarity of an input error into positive and negative error components; and generating the positive and negative error components in a plurality of time response intervals of the digital filter in which the sum of the weights of the positive and negative error components are substantially equal.

摘要翻译： 一种减少的斩波速率模数转换器技术，包括选择性地将输入采样加权到数字滤波器，将输入误差的极性交替地反转为正和负误差分量; 以及在数字滤波器的多个时间响应间隔中产生正和负误差分量，其中正误差分量和负误差分量的权重之和基本相等。

公开(公告)号：US07202805B2

公开(公告)日：2007-04-10

申请号：US11351708

申请日：2006-02-10

申请人： Adrian Sherry ,  Tomas Tansley

发明人： Adrian Sherry ,  Tomas Tansley

IPC分类号： H03M1/10

CPC分类号： H03M1/1014 ,  H03F1/34 ,  H03F3/45475 ,  H03F3/45636 ,  H03F2200/261 ,  H03F2203/45048 ,  H03F2203/45138 ,  H03F2203/45522 ,  H03M1/12

摘要： A gain calibration system for an amplifier includes an amplifier having inputs and outputs and an analog to digital converter having inputs and an output. There is a voltage supply for providing a plurality of output voltages. A first switching circuit couples at least one of the output voltages to the inputs of the amplifier in a first phase. A second switching circuit couples the outputs of the amplifier to the inputs of the analog to digital converter in the first phase and couples the sum of all of the at least one output voltages to the input of the analog to digital converter in a second phase. A processor responsive to the outputs of the analog to digital converter in the first and second phases calculates a calibration factor to accommodate for amplifier gain error.

摘要翻译： 用于放大器的增益校准系统包括具有输入和输出的放大器以及具有输入和输出的模数转换器。 存在用于提供多个输出电压的电压源。 第一开关电路将第一相中的至少一个输出电压耦合到放大器的输入端。 第二开关电路在第一阶段将放大器的输出耦合到模数转换器的输入，并将所有至少一个输出电压的总和以第二阶段耦合到模数转换器的输入端。 响应于第一和第二相中的模数转换器的输出的处理器计算校准因子以适应放大器增益误差。

公开(公告)号：US20070019770A1

公开(公告)日：2007-01-25

申请号：US11453684

申请日：2006-06-15

申请人： Shaun Bradley ,  Kieran Heffernan ,  Tomas Tansley ,  Yang Ling

发明人： Shaun Bradley ,  Kieran Heffernan ,  Tomas Tansley ,  Yang Ling

IPC分类号： H04L7/02

CPC分类号： H04L7/0004 ,  G06F1/04 ,  H03L1/00 ,  H03L7/00

摘要： A microprocessor programmable clock calibration device compares, in response to a calibration command from a programmable processor, turns on a normally off reference oscillator clock, compares the frequency of the reference oscillator clock with the frequency of a calibratable oscillator clock, turns off the reference oscillator clock and adjusts, in response to a difference in those frequencies, the frequency of the calibratable oscillator clock towards that of the reference oscillator clock.

摘要翻译： 微处理器可编程时钟校准装置响应来自可编程处理器的校准命令来比较正常关断参考振荡器时钟，将参考振荡器时钟的频率与可校准振荡器时钟的频率进行比较，将参考振荡器 响应于这些频率的差异，可调整校准振荡器时钟频率与参考振荡器时钟的频率。