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    PROGRAMMABLE GAIN AMPLIFIER AND A DELTA SIGMA ANALOG-TO-DIGITAL CONVERTER CONTAINING THE PGA
    2.
    发明申请
    PROGRAMMABLE GAIN AMPLIFIER AND A DELTA SIGMA ANALOG-TO-DIGITAL CONVERTER CONTAINING THE PGA 有权

    公开(公告)号：US20230110204A1

    公开(公告)日：2023-04-13

    申请号：US18061512

    申请日：2022-12-05

    申请人： Texas Instruments Incorporated

    发明人： Jun Zhang

    IPC分类号： H03M1/18 ,  H03G1/00 ,  H03G3/20 ,  H03F1/38 ,  H03M3/00 ,  H03F3/45 ,  H03G3/00

    摘要： A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

    MULTI-ELEMENT RESONATOR
    3.
    发明申请
    MULTI-ELEMENT RESONATOR 有权

    公开(公告)号：US20220247353A1

    公开(公告)日：2022-08-04

    申请号：US17665492

    申请日：2022-02-05

    申请人： FUTUREWEI TECHNOLOGIES, INC.

    发明人： Michael Bushman ,  James Caldwell

    IPC分类号： H03B5/12 ,  H03L7/099 ,  G06F1/10 ,  H03F1/38

    摘要： A resonant tank includes a first capacitor formed on a semiconductor substrate, a first inductor formed on the semiconductor substrate, a second capacitor formed on the semiconductor substrate, and a second inductor formed on the semiconductor substrate. The first capacitor, the first inductor, the second capacitor, and the second inductor are connected in a ring configuration, with each capacitor connected between a pair of the inductors and with each inductor connected between a pair of the capacitors. An amplifier circuit is coupled to the resonant tank and configured to amplify a signal in the resonant tank.

    Cartesian feedback circuit
    4.
    发明授权
    Cartesian feedback circuit 有权

    公开(公告)号：US11309850B2

    公开(公告)日：2022-04-19

    申请号：US16851284

    申请日：2020-04-17

    申请人： Mitsubishi Electric Corporation

    发明人： Hifumi Noto ,  Hiroyuki Akutsu

    IPC分类号： H03F1/38 ,  H03F1/34 ,  H03F3/19 ,  H04L27/36

    摘要： It is configured to output a first I signal having passed through a first inverse characteristic circuit having inverse frequency characteristics to frequency characteristics of a first loop filter circuit, to the first loop filter circuit, and output a first Q signal having passed through a second inverse characteristic circuit having inverse frequency characteristics to frequency characteristics of a second loop filter circuit, to the second loop filter circuit.

    COMMON-MODE INSENSITIVE CURRENT-SENSING TOPOLOGY IN FULL-BRIDGE DRIVER
    5.
    发明申请
    COMMON-MODE INSENSITIVE CURRENT-SENSING TOPOLOGY IN FULL-BRIDGE DRIVER 有权

    公开(公告)号：US20210344310A1

    公开(公告)日：2021-11-04

    申请号：US17003564

    申请日：2020-08-26

    申请人： Cirrus Logic International Semiconductor Ltd.

    发明人： Ramin ZANBAGHI ,  Cory J. PETERSON ,  Anand ILANGO ,  Eric KIMBALL

    IPC分类号： H03F3/217 ,  H03F3/45 ,  G05F1/46 ,  H03F1/38 ,  G01R1/20 ,  G01R19/175 ,  G01R19/165 ,  H04R1/10

    摘要： A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second high-side switch and the supply voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second high-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

    PROGRAMMABLE GAIN AMPLIFIER AND A DELTA SIGMA ANALOG-TO-DIGITAL CONVERTER CONTAINING THE PGA
    6.
    发明申请
    PROGRAMMABLE GAIN AMPLIFIER AND A DELTA SIGMA ANALOG-TO-DIGITAL CONVERTER CONTAINING THE PGA 审中-公开

    公开(公告)号：US20190288702A1

    公开(公告)日：2019-09-19

    申请号：US16427468

    申请日：2019-05-31

    申请人： TEXAS INSTRUMENTS INCORPORATED

    发明人： Jun Zhang

    IPC分类号： H03M1/18 ,  H03G1/00 ,  H03M3/00 ,  H03F1/38 ,  H03G3/20 ,  H03F3/45 ,  H03G3/00

    摘要： A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

    Semiconductor integrated circuit
    9.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号：US09306541B2

    公开(公告)日：2016-04-05

    申请号：US14110330

    申请日：2012-03-21

    申请人： Yasuyuki Suzuki

    发明人： Yasuyuki Suzuki

    IPC分类号： H03K17/16 ,  H03H11/28 ,  H03F3/45 ,  H03F1/38 ,  H03K3/2885 ,  H03K3/289

    CPC分类号： H03H11/28 ,  H03F1/38 ,  H03F3/45085 ,  H03F3/45475 ,  H03F2203/45138 ,  H03F2203/45652 ,  H03K3/2885 ,  H03K3/289

    摘要： In an integrated circuit having a feedback amplifier circuit composed of the feedback which feedbacks a part of the output signal to the input side in the first stage, a semiconductor integrated circuit of the present invention can suppress the occurrence of the data signal distortion and the gain peaking of the frequency characteristic generated by inter-stage wiring between the first stage and the latter stage.A semiconductor integrated circuit of the present invention includes the first circuit and the second circuit having the first output connected to the first circuit, and the second output that is a signal similar to said first output is outputted from between said first circuit and said second circuit. In addition, a semiconductor integrated circuits of the present invention has the feature that the output impedance pulled out from between said first circuit and said second circuit, the input impedance of the circuit connected to the latter stage of said second circuit and the characteristic impedance of the wiring which connects said second output with a circuit connected to the latter stage of said second circuit are equal to each other.

    摘要翻译： 在具有反馈放大电路的集成电路中，反馈放大电路由在第一级反馈输出信号的一部分输入侧的反馈构成，本发明的半导体集成电路可以抑制数据信号失真和增益的发生 在第一阶段和后一阶段之间由阶段布线产生的频率特性的峰值。 本发明的半导体集成电路包括具有连接到第一电路的第一输出的第一电路和第二电路，并且作为类似于所述第一输出的信号的第二输出从所述第一电路和所述第二电路之间输出 。 此外，本发明的半导体集成电路具有从所述第一电路和所述第二电路之间拉出的输出阻抗，连接到所述第二电路的后级的电路的输入阻抗和所述第二电路的特性阻抗 将所述第二输出与连接到所述第二电路的后级的电路连接的布线彼此相等。

    Comparator with Self-Limiting Positive Feedback
    10.
    发明申请
    Comparator with Self-Limiting Positive Feedback 有权
    具有自限制正反馈的比较器

    公开(公告)号：US20130293306A1

    公开(公告)日：2013-11-07

    申请号：US13933499

    申请日：2013-07-02

    申请人： Robert Bosch GmbH

    发明人： Robert Wolf ,  Christoph Lang ,  Xinyu Xing ,  Sam Kavusi

    IPC分类号： H03F1/38

    CPC分类号： H03F1/38 ,  H03K5/08 ,  H03K5/2481

    摘要： A method and circuit for attenuating positive feedback in a comparator in one embodiment includes an amplifier configured to compare a first input signal with a second input signal and to provide an output based upon the comparison, a non-linear function with a first input operably connected to an output of the amplifier, and a feedback loop operably connected to the output of the non-linear function and to a second input of the non-linear function, the feedback loop including a feedback limiting circuit configured to attenuate a feedback signal to the second input of the non-linear function.

    摘要翻译： 在一个实施例中用于衰减比较器中的正反馈的方法和电路包括：放大器，被配置为将第一输入信号与第二输入信号进行比较，并且基于比较提供输出，非线性函数与第一输入可操作地连接 耦合到放大器的输出端，以及可操作地连接到非线性功能的输出端和非线性功能的第二输入端的反馈回路，反馈回路包括反馈限制电路，该反馈限制电路被配置为将反馈信号衰减到 第二输入的非线性函数。