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11 条记录 (耗时 0.017 秒)

    Laminated chip common mode choke coil
    1.
    发明授权
    Laminated chip common mode choke coil 失效
    叠层芯片共模扼流圈

    公开(公告)号：US5250923A

    公开(公告)日：1993-10-05

    申请号：US997393

    申请日：1992-12-28

    申请人： Tomoaki Ushiro ,  Toshio Kawabata ,  Daiji Kono ,  Hisato Oshima

    发明人： Tomoaki Ushiro ,  Toshio Kawabata ,  Daiji Kono ,  Hisato Oshima

    IPC分类号： H01F17/00 ,  H01F27/32 ,  H01F37/00 ,  H01F27/30

    CPC分类号： H01F17/0013 ,  H01F2017/0093

    摘要： A conductor pattern for forming coils and lead-out electrodes which are led out from the coils are formed on a magnetic substance sheet. Furthermore, said magnetic substance sheet is provided with through-holes for connecting the conductor patterns. The magnetic substance sheets disposed respectively just over and just under the conductor pattern that becomes the lead-out electrodes are coated with non-magnetic material paste. A laminated chip common mode choke coil is produced by laminating these magnetic substance sheets and baking them integrally and thereafter forming external electrodes. The non-magnetic material diffuses into the magnetic substance sheet by baking the lamination of the magnetic substance sheets, and the permeability of that portion becomes low. Therefore, the magnetic reluctance around the lead-out electrode becomes high, thus reducing leakage flux around that portion. Thereby, coupling between two coils formed in the choke coil becomes good.

    摘要翻译： 用于形成从线圈引出的线圈和引出电极的导体图案形成在磁性物质片上。 此外，所述磁性物质片设置有用于连接导体图案的通孔。 分别设置在成为引出电极的导体图案正上方且正好在其下方的磁性物质片被非磁性材料糊涂覆。 通过层叠这些磁性物质片并一体地烘烤它们，然后形成外部电极来制造层叠芯片共模扼流线圈。 非磁性材料通过烘焙磁性物质片的层叠而扩散到磁性物质片中，并且该部分的磁导率变低。 因此，引出电极周围的磁阻变高，从而减少该部分附近的漏磁通。 因此，形成在扼流线圈中的两个线圈之间的耦合变得良好。

    Composite electronic part
    3.
    发明授权
    Composite electronic part 失效
    复合电子部件

    公开(公告)号：US5453316A

    公开(公告)日：1995-09-26

    申请号：US240327

    申请日：1994-05-10

    申请人： Hiroshi Morii ,  Hiroshi Komatsu ,  Tomoaki Ushiro ,  Tomio Yamasaki ,  Toshio Kawabata

    发明人： Hiroshi Morii ,  Hiroshi Komatsu ,  Tomoaki Ushiro ,  Tomio Yamasaki ,  Toshio Kawabata

    IPC分类号： H01G4/12 ,  H01G4/40 ,  H03H3/00 ,  H03H7/01 ,  B32B9/00

    CPC分类号： H03H3/00 ,  H01G4/40 ,  H03H7/0115 ,  H03H2001/0057 ,  H03H2001/0085 ,  Y10S428/901 ,  Y10T428/24926 ,  Y10T428/31678

    摘要： A composite electronic part includes a dielectric ceramic portion consisting of a Pb group dielectric material. Inside the dielectric ceramic portion, an internal electrode constituting a portion of a capacitor is formed. The dielectric ceramic portion is bonded to a magnetic ceramic portion consisting of a Ni--Zn group ferrite material by an intermediate layer consisting of a ceramic material containing Pb, Ni, Fe and Nb as main components. Inside the magnetic ceramic portion, an internal electrode constituting a portion of an inductor is formed. Furthermore, at end portions of the dielectric ceramic portion, intermediate layer and magnetic ceramic portion, a plurality of external electrodes consisting of, for example, Ag are formed, and connected to the predetermined internal electrodes.

    摘要翻译： 复合电子部件包括由Pb族电介质材料构成的电介质陶瓷部。 在介质陶瓷部分内部，形成构成电容器的一部分的内部电极。 介电陶瓷部通过由含有Pb，Ni，Fe和Nb作为主要成分的陶瓷材料构成的中间层与Ni-Zn系铁氧体材料组成的磁性陶瓷部分接合。 在磁陶瓷部分内形成构成电感器的一部分的内部电极。 此外，在介质陶瓷部分，中间层和磁性陶瓷部分的端部，形成由例如Ag组成的多个外部电极，并连接到预定的内部电极。

    Process for producing a voltage-dependent nonlinear resistor
    5.
    发明授权
    Process for producing a voltage-dependent nonlinear resistor 失效
    制造电压相关非线性电阻的工艺

    公开(公告)号：US5753176A

    公开(公告)日：1998-05-19

    申请号：US677619

    申请日：1996-07-08

    申请人： Tomoaki Ushiro ,  Hiroshi Komatsu ,  Tooru Tominaga ,  Hiroyuki Kubota ,  Kazutaka Nakamura ,  Masahiro Yuruki

    发明人： Tomoaki Ushiro ,  Hiroshi Komatsu ,  Tooru Tominaga ,  Hiroyuki Kubota ,  Kazutaka Nakamura ,  Masahiro Yuruki

    IPC分类号： C04B35/453 ,  C04B35/632 ,  H01C7/10 ,  C04B37/00 ,  C04B35/10

    CPC分类号： C04B35/453 ,  C04B35/6325

    摘要： A process for producing a voltage-dependent nonlinear resistor that contains zinc oxide as a major component and that also contains a minor oxide component, is improved by the steps of adding an organometallic compound as the minor oxide component to the powder of zinc oxide, mixing the two components, forming the mixture into a shape and sintering the shape. The organometallic compound as the minor oxide component is either a compound in which a hydrocarbon group is bound to a metal atom or a compound in which the hydrogen atom in a carboxyl, hydroxyl, imino group, etc., is replaced by a metal. The method is capable of reducing the scattering of the electrical characteristics of the voltage-dependent nonlinear resistor, which contributes to an improvement of the change of varistor voltage by surge current.

    摘要翻译： 通过将氧化锌粉末作为少量氧化物成分添加有机金属化合物的步骤，可以改善含有氧化锌作为主要成分并且还含有少量氧化物成分的电压型非线性电阻体的制造方法 这两个组分，将混合物形成形状并烧结形状。 作为少量氧化物成分的有机金属化合物是其中烃基与金属原子结合的化合物或其中羧基，羟基，亚氨基等中的氢原子被金属取代的化合物。 该方法能够减小电压依赖型非线性电阻器的电气特性的散射，这有助于通过浪涌电流提高压阻电压的变化。

    Method of manufacturing chip-type common mode choke coil
    6.
    发明授权
    Method of manufacturing chip-type common mode choke coil 失效
    芯片型共模扼流线圈制造方法

    公开(公告)号：US5850682A

    公开(公告)日：1998-12-22

    申请号：US677071

    申请日：1996-07-09

    申请人： Tomoaki Ushiro

    发明人： Tomoaki Ushiro

    IPC分类号： H01F17/00 ,  H01F37/00 ,  H01F41/04 ,  H01F41/02

    CPC分类号： H01F41/043 ,  H01F17/0013 ,  H01F41/046 ,  H01F2017/0093 ,  Y10T29/4902 ,  Y10T29/49076

    摘要： In a chip type common mode choke coil, a plurality of non-magnetic sheets on which conductor lines are formed are laminated one on another to form a non-magnetic member, and the conductor lines are connected to form primary and secondary coils inside the non-magnetic member, and a pair of magnetic layers are formed on the upper and lower surface of the non-magnetic member, and magnetic cores are arranged substantially at the centers of the loops of the coils in such a manner that they penetrate the non-magnetic member and are connected to the pair of magnetic layers, whereby a closed magnetic path crossing the primary and secondary coils is formed.

    摘要翻译： 在芯片型共模扼流线圈中，形成有导体线的多个非磁性片层叠在一起形成非磁性部件，并且导体线被连接以在非磁性部件内形成初级和次级线圈， 磁性构件，并且在非磁性构件的上表面和下表面上形成一对磁性层，并且磁芯基本上布置在线圈的环的中心处，使得它们穿过非磁性构件， 并且与一对磁性层连接，由此形成与初级线圈和次级线圈交叉的闭合磁路。

    Laminated transformer
    7.
    发明授权
    Laminated transformer 失效
    层压变压器

    公开(公告)号：US5655287A

    公开(公告)日：1997-08-12

    申请号：US530821

    申请日：1995-09-20

    申请人： Tomoaki Ushiro

    发明人： Tomoaki Ushiro

    IPC分类号： H01F10/08 ,  H01F27/28 ,  H01F30/00 ,  H01F30/10 ,  H01F41/04 ,  H01F3/02 ,  H01F7/06

    CPC分类号： H01F27/2804 ,  H01F30/10 ,  H01F41/043 ,  H01F2027/2809 ,  Y10T29/49055 ,  Y10T29/49078 ,  Y10T29/49126 ,  Y10T29/49789

    摘要： Two parts of magnetic layers are placed so as to clamp a coil forming unit consisting of an alternated laminate of non-magnetic layers and electrode layers. The coil forming unit is surrounded by the magnetic body to form a closed magnetic circuit. When manufacturing the laminated transformer, a plurality of sets of U-shaped electrodes are deposited on non-magnetic green sheets. Then, the non-magnetic green sheets are laminated to form the coil forming unit consisting of the alternated laminate of the non-magnetic layers and the electrode layers. Magnetic green sheets are laminated thereto and clamp the non-magnetic green sheets therebetween to form a laminate. The laminate is pressed and additional magnetic body portions are formed in the center and on the side faces of the coil forming units. The laminate is pressed and cut into green elements. The green elements are sintered into monolithic bodies of the laminated transformer.

    摘要翻译： 放置两层磁性层以夹紧由非磁性层和电极层的交替叠层组成的线圈形成单元。 线圈形成单元被磁体包围以形成闭合磁路。 当制造层压变压器时，在非磁性生片上沉积多组U形电极。 然后，非磁性生片被层叠，形成由非磁性层和电极层的交替叠层构成的线圈形成单元。 将磁性生片层压到其上并将非磁性生片夹在其间以形成层压体。 层叠体被压制，并且在线圈成形单元的中心和侧面形成附加的磁性体部分。 将层压板压制成绿色元件。 绿色元件被烧结成层压变压器的单块体。

    Work holder for masking
    8.
    发明授权
    Work holder for masking 失效
    掩蔽工作台

    公开(公告)号：US4920915A

    公开(公告)日：1990-05-01

    申请号：US361500

    申请日：1989-06-05

    申请人： Atsuo Senda ,  Toshi Numata ,  Tomoaki Ushiro ,  Takuji Nakagawa ,  Masaaki Taniguchi

    发明人： Atsuo Senda ,  Toshi Numata ,  Tomoaki Ushiro ,  Takuji Nakagawa ,  Masaaki Taniguchi

    IPC分类号： C23C14/04 ,  C23C14/50

    CPC分类号： C23C14/50 ,  C23C14/042

    摘要： A work holder (12) for holding a workpiece (2) while partially masking the same by use of a mask (18). The workpiece and the mask are elastically pressed against each other by an aggregate (15) of heat-resistant fiber such as metal fiber or ceramic fiber, so that the workpiece and the mask are brought into close contact with each other. This work holder is adapted to form a resistor film (9) on a part of the surface of a chip (2) to form a chip-type resistor (1), for example, by a thin film forming method such as sputtering.

    摘要翻译： 一种用于通过使用掩模（18）对工件（2）进行部分掩蔽的工件（2）的工件保持器（12）。 工件和面罩通过诸如金属纤维或陶瓷纤维的耐热纤维的骨料（15）彼此弹性地压靠，使得工件和面罩彼此紧密接触。 该工件保持器适于在芯片（2）的表面的一部分上形成电阻膜（9），以例如通过诸如溅射的薄膜形成方法形成芯片型电阻器（1）。

    Chip-type common mode choke coil
    9.
    发明授权
    Chip-type common mode choke coil 失效
    芯片式共模扼流圈

    公开(公告)号：US5552756A

    公开(公告)日：1996-09-03

    申请号：US180216

    申请日：1994-01-12

    申请人： Tomoaki Ushiro

    发明人： Tomoaki Ushiro

    IPC分类号： H01F17/00 ,  H01F37/00 ,  H01F41/04 ,  H01F5/00

    CPC分类号： H01F41/043 ,  H01F17/0013 ,  H01F41/046 ,  H01F2017/0093 ,  Y10T29/4902 ,  Y10T29/49076

    摘要： In a chip type common mode choke coil, a plurality of non-magnetic sheets on which conductor lines are formed are laminated one on another to form a non-magnetic member, and the conductor lines are connected to form primary and secondary coils inside the non-magnetic member, and a pair of magnetic layers are formed on the upper and lower surface of the non-magnetic member, and magnetic cores are arranged substantially at the centers of the loops of the coils in such a manner that they penetrate the non-magnetic member and are connected to the pair of magnetic layers, whereby a closed magnetic path crossing the primary and secondary coils is formed.

    摘要翻译： 在芯片型共模扼流线圈中，形成有导体线的多个非磁性片层叠在一起形成非磁性部件，并且导体线被连接以在非磁性部件内形成初级和次级线圈， 磁性构件，并且在非磁性构件的上表面和下表面上形成一对磁性层，并且磁芯基本上布置在线圈的环的中心处，使得它们穿过非磁性构件， 并且与一对磁性层连接，由此形成与初级线圈和次级线圈交叉的闭合磁路。