Chip type varistor
    2.
    发明授权
    Chip type varistor 失效
    片式压敏电阻

    公开(公告)号:US5324986A

    公开(公告)日:1994-06-28

    申请号:US901750

    申请日:1992-06-22

    CPC分类号: H01C7/10 H01C7/112

    摘要: A chip type varistor in which first and second inner electrodes are embedded in a sintered body obtained by laminating a plurality of semiconductor ceramics layers so as not to be overlapped with each other in the direction of thickness of the ceramics layers, respective one edges of the first and second inner electrodes are led out to one and the other of a pair of side surfaces opposed to each other of the sintered body and are electrically connected to outer electrodes formed on the pair of side surfaces of the sintered body, respectively, a non-connected type inner electrode which is not electrically connected to the above described outer electrodes is embedded in the sintered body, and the non-connected type inner electrode is arranged so as to be overlapped with the first and second inner electrodes while being separated by the semiconductor ceramics layer.

    摘要翻译: 一种芯片型变阻器,其中第一和第二内部电极嵌入在通过层叠多个半导体陶瓷层而不是在陶瓷层的厚度方向上彼此不重叠而获得的烧结体中, 第一和第二内部电极被引出到烧结体彼此相对的一对侧表面中的一个和另一个,并且分别与形成在烧结体的一对侧表面上的外部电极电连接, 不与上述外部电极电连接的连接型内部电极嵌入在烧结体中,非连接型内部电极配置成与第一和第二内部电极重叠,同时被 半导体陶瓷层。

    Monolithic type varistor
    3.
    发明授权
    Monolithic type varistor 失效
    单片类型变量

    公开(公告)号:US5119062A

    公开(公告)日:1992-06-02

    申请号:US615369

    申请日:1990-11-19

    IPC分类号: H01C7/10

    CPC分类号: H01C7/10

    摘要: A monolithic type varistor in which a plurality of inner electrodes are arranged in a sintered body composed of semiconductor ceramics so as to be overlapped with each other while being separated by semiconductor ceramic layers. The plurality of inner electrodes are electrically connected to first and second outer electrodes formed on both end surfaces of the sintered body. One or more non-connected type inner electrodes are arranged between adjacent ones of the plurality of inner electrodes and are not electrically connected to the outer electrodes, each of the non-connected type inner electrodes being spaced apart from each adjacent inner electrode or non-connected type inner electrode while being separated therefrom by a semiconductor ceramic layer. Voltage non-linearity is obtained by Schottky barriers formed at the interface of the inner electrode and the semiconductor ceramic layer and the interface of the non-connected type inner electrode and the semiconductor ceramic layer. The value of the number of grain boundaries between semiconductor particles in at least one semiconductor ceramic layer is two or less.

    摘要翻译: 一种单片型压敏电阻,其中多个内部电极被布置在由半导体陶瓷组成的烧结体中,以便在被半导体陶瓷层分离的同时彼此重叠。 多个内部电极电连接到形成在烧结体的两个端面上的第一和第二外部电极。 一个或多个非连接型内部电极布置在多个内部电极的相邻的内部电极之间,并且不与外部电极电连接,每个非连接型内部电极与每个相邻的内部电极或非电连接的内部电极间隔开, 连接型内部电极,同时由半导体陶瓷层分离。 通过在内部电极和半导体陶瓷层的界面处形成的肖特基势垒以及非连接型内部电极和半导体陶瓷层的界面获得电压非线性。 至少一个半导体陶瓷层中的半导体粒子之间的晶界数的值为2以下。

    Noise filter having non-linear voltage-dependent resistor body with a
resistive layer
    4.
    发明授权
    Noise filter having non-linear voltage-dependent resistor body with a resistive layer 失效
    噪声滤波器具有带电阻层的非线性电压相关电阻体

    公开(公告)号:US5412357A

    公开(公告)日:1995-05-02

    申请号:US036438

    申请日:1993-03-24

    CPC分类号: H03H1/02 H03H2001/0085

    摘要: A noise filter including semi-conductor ceramics having voltage non-linearity characteristics. End surface electrodes are formed on a pair of opposing end surfaces of the semi-conductor ceramics and side surface electrodes are formed on a pair of side surfaces thereof. A first inner electrode is formed inside the semi-conductor ceramics having one end surface electrically connected to one of the end surface electrodes. A second inner electrode is formed inside the semi-conductor ceramics so as to be overlapped with the first inner electrode and separated therefrom by a ceramic layer. Both end surfaces of the second inner electrode are electrically connected to the pair of side surface electrodes. At least one resistance layer is embedded in the semi-conductor ceramics so that both end surfaces of the resistance layer are electrically connected to the pair of end surface electrodes.

    摘要翻译: 一种噪声滤波器,包括具有电压非线性特性的半导体陶瓷。 端面电极形成在半导体陶瓷的一对相对端面上,侧面电极形成在其一对侧面上。 第一内部电极形成在半导体陶瓷的内部,其一端表面电连接到一个端面电极。 第二内部电极形成在半导体陶瓷的内部,以与第一内部电极重叠并与陶瓷层分离。 第二内部电极的两端面与一对侧面电极电连接。 在半导体陶瓷中嵌入至少一个电阻层,使得电阻层的两个端面与一对端面电极电连接。

    Fixed resistor
    6.
    发明授权
    Fixed resistor 失效
    固定电阻

    公开(公告)号:US5355112A

    公开(公告)日:1994-10-11

    申请号:US14362

    申请日:1993-02-05

    IPC分类号: H01C1/028 H01C1/02 H01C1/012

    CPC分类号: H01C1/028

    摘要: A resistor having a ceramic sintered body and at least one resistor film embedded therein so as to be covered by the ceramic sintered body except for portions of the resistor film-chat are connected to external electrodes. The sintered body is mainly composed of ZnO, and contains at least one element of Bi, Pb, B and Si as a subcomponent with respect to the main component.

    摘要翻译: 具有陶瓷烧结体和至少一个电阻膜的电阻器被连接到外部电极,该电阻器被嵌入其中以便被陶瓷烧结体覆盖,除了电阻膜的部分之外。 烧结体主要由ZnO组成,并且相对于主要成分含有Bi,Pb,B和Si中的至少一种元素作为副成分。

    Laminated varistor
    7.
    发明授权
    Laminated varistor 失效
    层压变阻器

    公开(公告)号:US5075665A

    公开(公告)日:1991-12-24

    申请号:US404838

    申请日:1989-09-08

    IPC分类号: H01C1/14 H01C7/102

    CPC分类号: H01C7/102 H01C1/14

    摘要: Respective first end portions of first and second internal electrodes are exposed at respective end surfaces of a varistor body, which is in the form of a rectangular parallelepiped. These end surfaces of the varistor body are covered with low resistance parts which include ceramic material in order to prevent the internal electrodes from decomposition. External electrodes are formed on the low resistance parts, so as, to be electrically connected with corresponding ones of the internal electrodes through the low resistance parts.

    摘要翻译: 第一和第二内部电极的相应的第一端部暴露在可变形电阻体的相应的端面上,该非线性电阻体是矩形平行六面体的形式。 可变电阻体的这些端面由包括陶瓷材料的低电阻部分覆盖,以防止内部电极分解。 外部电极形成在低电阻部分上,以便通过低电阻部分与相应的内部电极电连接。

    Process for preparing powdered ceramic raw materials of complex oxide
    9.
    发明授权
    Process for preparing powdered ceramic raw materials of complex oxide 失效
    复合氧化物粉末陶瓷原料的制备方法

    公开(公告)号:US4820669A

    公开(公告)日:1989-04-11

    申请号:US856038

    申请日:1986-04-25

    摘要: A process for preparing a powdered ceramic raw material comprises the steps of(a) adding ammonia gas or an alkali to a first aqueous solution containing a water-soluble salt of lead capable of being precipitated as a hydroxide until the pH of the first solution reaches a value within the range of 9 to 10 to form a precipitate of lead hydroxide;(b) adding ammonia gas or alkali to a second aqueous solution containing at least one water-soluble salt or ceramic components other than lead capable of being precipitated as a hydroxide until the pH of the second solution reaches a value within the range of 9 to 10 to form a precipitate of hydroxide of said ceramic components;(c) mixing the resulting reaction mixtures, followed by separation of the precipitates of hydroxides from solution, washing with water and drying; and(d) calcining the precipitate to form complex oxides of said ceramic material.

    摘要翻译: 制备粉末状陶瓷原料的方法包括以下步骤:(a)将氨气或碱添加到含有能够以氢氧化物沉淀的铅的水溶性盐的第一水溶液中,直到第一溶液的pH达到 在9至10的范围内的值以形成氢氧化铅的沉淀物; (b)将氨气或碱加入含有至少一种水溶性盐或除了能够以氢氧化钠沉淀的铅的陶瓷成分的第二水溶液,直到第二溶液的pH达到9〜 以形成所述陶瓷组分的氢氧化物沉淀物; (c)混合得到的反应混合物,然后从溶液中分离氢氧化物沉淀物,用水洗涤并干燥; 和(d)煅烧沉淀物以形成所述陶瓷材料的复合氧化物。