Light emitting diode array and method of forming the same
    1.
    发明授权
    Light emitting diode array and method of forming the same 有权
    发光二极管阵列及其形成方法

    公开(公告)号:US06342402B1

    公开(公告)日:2002-01-29

    申请号:US09459596

    申请日:1999-12-13

    IPC分类号: H01L2100

    CPC分类号: H01L27/153

    摘要: A light emitting diode array includes a light emitting area formed on a semiconductor substrate, a diffusion prevention layer formed on the semiconductor substrate, and an insulating layer formed on the diffusion prevention layer. The diffusion prevention layer has a lower edge and the insulating layer has a level drop at this lower edge. An interconnection conductor extends on the insulating layer and is in ohmic contact with the light emitting region through holes in the insulating layer and the diffusion prevention layer. The interconnection conductor has a stepped portion at the level drop of the insulating layer, the stepped portion being located in a wide-width segment of the interconnection conductor. A method for forming such a light emitting diode array includes the steps of providing a semiconductor substrate, forming a light emitting region on the substrate, forming a diffusion prevention layer on the substrate surrounding the light emitting region, forming in insulating layer on the diffusion prevention layer, covering the light emitting region and the insulating layer with a conductive layer, forming a mask layer on a predetermined portion of the conductive layer, the mask layer having a wide-width segment located on the stepped portion, and selectively forming the interconnection conductor by etching the conductive layer using the mask layer. Several embodiments of both the method and the array are disclosed.

    摘要翻译: 发光二极管阵列包括形成在半导体衬底上的发光区域,形成在半导体衬底上的扩散防止层以及形成在扩散防止层上的绝缘层。 扩散防止层具有下边缘,并且绝缘层在该下边缘处具有电平下降。 互连导体在绝缘层上延伸并与绝缘层和扩散防止层中的发光区域通过孔欧姆接触。 互连导体在绝缘层的电平下降处具有台阶部分,台阶部位于互连导体的宽幅部分。 形成这样的发光二极管阵列的方法包括以下步骤:提供半导体衬底,在衬底上形成发光区域,在围绕发光区域的衬底上形成扩散防止层,在绝缘层上形成防扩散 层,用导电层覆盖发光区域和绝缘层,在导电层的预定部分上形成掩模层,掩模层具有位于台阶部分上的宽度段,并且选择性地形成互连导体 通过使用掩模层蚀刻导电层。 公开了方法和阵列的几个实施例。

    Light emitting diode array with contact geometry
    2.
    发明授权
    Light emitting diode array with contact geometry 失效
    具有接触几何形状的发光二极管阵列

    公开(公告)号:US6054723A

    公开(公告)日:2000-04-25

    申请号:US752943

    申请日:1996-11-21

    IPC分类号: H01L27/15 H01L33/00

    CPC分类号: H01L27/153

    摘要: A light emitting diode array includes a light emitting area formed on a semiconductor substrate, a diffusion prevention layer formed on the semiconductor substrate, and an insulating layer formed on the diffusion prevention layer. The diffusion prevention layer has a lower edge and the insulating layer has a level drop at this lower edge. An interconnection conductor extends on the insulating layer and is in ohmic contact with the light emitting region through holes in the insulating layer and the diffusion prevention layer. The interconnection conductor has a stepped portion at the level drop of the insulating layer, the stepped portion being located in a wide-width segment of the interconnection conductor. A method for forming such a light emitting diode array includes the steps of providing a semiconductor substrate, forming a light emitting region on the substrate, forming a diffusion prevention layer on the substrate surrounding the light emitting region, forming in insulating layer on the diffusion prevention layer, covering the light emitting region and the insulating layer with a conductive layer, forming a mask layer on a predetermined portion of the conductive layer, the mask layer having a wide-width segment located on the stepped portion, and selectively forming the interconnection conductor by etching the conductive layer using the mask layer. Several embodiments of both the method and the array are disclosed.

    摘要翻译: 发光二极管阵列包括形成在半导体衬底上的发光区域,形成在半导体衬底上的扩散防止层以及形成在扩散防止层上的绝缘层。 扩散防止层具有下边缘,并且绝缘层在该下边缘处具有电平下降。 互连导体在绝缘层上延伸并与绝缘层和扩散防止层中的发光区域通过孔欧姆接触。 互连导体在绝缘层的电平下降处具有台阶部分,台阶部位于互连导体的宽幅部分。 形成这样的发光二极管阵列的方法包括以下步骤:提供半导体衬底,在衬底上形成发光区域,在围绕发光区域的衬底上形成扩散防止层,在绝缘层上形成防扩散 层,用导电层覆盖发光区域和绝缘层,在导电层的预定部分上形成掩模层,掩模层具有位于台阶部分上的宽度段,并且选择性地形成互连导体 通过使用掩模层蚀刻导电层。 公开了方法和阵列的几个实施例。

    Composite semiconductor device, print head and image forming apparatus
    3.
    发明授权
    Composite semiconductor device, print head and image forming apparatus 有权
    复合半导体器件,打印头和成像设备

    公开(公告)号:US08130253B2

    公开(公告)日:2012-03-06

    申请号:US12457019

    申请日:2009-05-29

    IPC分类号: B41J2/45 H01L21/00

    摘要: A composite semiconductor device is formed of a semiconductor wafer having a plurality of device-forming areas in which semiconductor elements are formed and dicing areas defined between the device-forming areas, and is formed by dicing the semiconductor wafer at the dicing areas. The composite semiconductor device includes a semiconductor substrate, and a plurality of wiring layers layered on the semiconductor substrate. The wiring layers include at least conductive films. Connecting portions are formed to connect the wiring layers with each other in a layering direction of the wiring layers. Each of the connecting portions is disposed on the device-forming area side with respect to a dicing position defined in the dicing area.

    摘要翻译: 复合半导体器件由半导体晶片形成,半导体晶片具有形成半导体元件的多个器件形成区域和限定在器件形成区域之间的切割区域,并且通过在切割区域切割半导体晶片而形成。 复合半导体器件包括半导体衬底和层叠在半导体衬底上的多个布线层。 布线层至少包括导电膜。 形成连接部,在配线层的层叠方向上连接布线层。 每个连接部分相对于在切割区域中限定的切割位置设置在装置形成区域侧。

    Composite semiconductor device, print head and image forming apparatus
    4.
    发明申请
    Composite semiconductor device, print head and image forming apparatus 有权
    复合半导体器件,打印头和成像设备

    公开(公告)号:US20090322852A1

    公开(公告)日:2009-12-31

    申请号:US12457019

    申请日:2009-05-29

    IPC分类号: B41J27/00 H01L23/48

    摘要: A composite semiconductor device is formed of a semiconductor wafer having a plurality of device-forming areas in which semiconductor elements are formed and dicing areas defined between the device-forming areas, and is formed by dicing the semiconductor wafer at the dicing areas. The composite semiconductor device includes a semiconductor substrate, and a plurality of wiring layers layered on the semiconductor substrate. The wiring layers include at least conductive films. Connecting portions are formed to connect the wiring layers with each other in a layering direction of the wiring layers. Each of the connecting portions is disposed on the device-forming area side with respect to a dicing position defined in the dicing area.

    摘要翻译: 复合半导体器件由半导体晶片形成,半导体晶片具有形成半导体元件的多个器件形成区域和限定在器件形成区域之间的切割区域,并且通过在切割区域切割半导体晶片而形成。 复合半导体器件包括半导体衬底和层叠在半导体衬底上的多个布线层。 布线层至少包括导电膜。 形成连接部,在配线层的层叠方向上连接布线层。 每个连接部分相对于在切割区域中限定的切割位置设置在装置形成区域侧。