Detection circuit for detecting standard television signals and
nonstandard television signals
    1.
    发明授权
    Detection circuit for detecting standard television signals and nonstandard television signals 失效
    用于检测标准电视信号和非标准电视信号的检测电路

    公开(公告)号:US4821112A

    公开(公告)日:1989-04-11

    申请号:US63477

    申请日:1987-06-18

    CPC分类号: H04N9/641

    摘要: There is provided a detection circuit for TV receiver which includes a frame comb filter and a field comb filter and which generates a luminance signal or a chrominance signal by effecting addition or subtraction upon video signals of two frames adjoining each other included in the received TV signal. This detection circuit includes a synchronization separation circuit, an APC circuit, a frequency division circuit connected to the APC circuit, and a comparator circuit connected to the frequency division circuit. The frequency of the chrominance subcarrier signal is demultiplied by the frequency division circuit. The phase of the chrominance subcarrier signal thus frequency-divided is compared with the phase of the synchronizing signal separated by the synchronizing separation circuit. It is thus judged whether the received TV signal is a standard TV signal or a nonstandard TV signal.

    摘要翻译: 提供了一种用于TV接收机的检测电路,其包括帧梳状滤波器和场梳状滤波器,并且通过对包含在所接收的TV信号中的彼此相邻的两个帧的视频信号进行加法或减法而产生亮度信号或色度信号 。 该检测电路包括同步分离电路,APC电路,连接到APC电路的分频电路,以及连接到分频电路的比较电路。 色差副载波信号的频率由分频电路分频。 将这样分频的色度副载波信号的相位与由同步分离电路分离的同步信号的相位进行比较。 因此判断所接收的TV信号是标准TV信号还是非标准TV信号。

    Digital signal processing circuit driven by a switched clock and used in
television receiver for processing standard and nonstandard television
signals
    2.
    发明授权
    Digital signal processing circuit driven by a switched clock and used in television receiver for processing standard and nonstandard television signals 失效
    由切换时钟驱动的数字信号处理电路,用于电视接收机处理标准和非标准电视信号

    公开(公告)号:US4860090A

    公开(公告)日:1989-08-22

    申请号:US164914

    申请日:1988-03-07

    IPC分类号: H04N9/64 H04N9/77 H04N11/04

    CPC分类号: H04N9/641

    摘要: A digital television receiver includes a decision circuit for deciding whether an input television signal is a standard signal or a nonstandard signal. A first clock signal generator circuit for generating a first sampling clock signal synchronized with a color burst signal is provided in combination with a second clock signal generator circuit for generating a second sampling clock signal synchronized with a horizontal synchronizing signal. When the standard television signal is received, the television signal is processed by employing the first sampling clock signal. When the nonstandard television signal is received, the television signal is processed by employing the second sampling clock signal.

    摘要翻译: 数字电视接收机包括用于判定输入电视信号是标准信号还是非标准信号的判定电路。 与用于产生与水平同步信号同步的第二采样时钟信号的第二时钟信号发生器电路组合地提供用于产生与色同步信号同步的第一采样时钟信号的第一时钟信号发生器电路。 当接收到标准电视信号时,通过采用第一采样时钟信号来处理电视信号。 当接收到非标准电视信号时,通过采用第二采样时钟信号来处理电视信号。

    Motion detector for chrominance signal in TV receiver
    3.
    发明授权
    Motion detector for chrominance signal in TV receiver 失效
    电视接收机色度信号运动检测器

    公开(公告)号:US4736252A

    公开(公告)日:1988-04-05

    申请号:US932376

    申请日:1986-11-20

    CPC分类号: H04N5/144

    摘要: A motion detector for a chrominance signal which is used with a TV receiver equipped with a video signal motion detector. This motion detector for a chrominance signal has a delay element for delaying the chrominance signal of a video signal by 1 frame period, a subtractor for subtracting the output signal of the delay element from the input signal thereof, an absolute value conversion circuit to which the output signal from the subtractor is inputted, and a smoother circuit to which the output signal from the absolute value conversion circuit is supplied. If the chrominance signals of video signals on two consecutive frames are the same, the output signal of the subtractor becomes zero. If the chrominance signals of video signals on two consecutive frames are different, the output signal of the substractor takes a positive or negative value. The negative value signal is converted into a positive value signal by the absolute value conversion circuit. A signal is outputted from the smoother circuit only when the chrominance signals of video signals on two consecutive frames are different. This outputted signal is a chrominance signal motion detection signal. The luminance signal contained in a video signal is removed from the video signal using a comb-type filter.

    摘要翻译: 用于与配备有视频信号运动检测器的TV接收机一起使用的色度信号的运动检测器。 用于色度信号的运动检测器具有用于将视频信号的色度信号延迟1帧周期的延迟元件,用于从其输入信号中减去延迟元件的输出信号的减法器,绝对值转换电路, 输入来自减法器的输出信号,并且提供来自绝对值转换电路的输出信号的平滑电路。 如果两个连续帧上的视频信号的色度信号相同,则减法器的输出信号变为零。 如果两个连续帧上的视频信号的色度信号不同,则减法器的输出信号为正或负值。 负值信号由绝对值转换电路转换为正值信号。 仅当两个连续帧上的视频信号的色度信号不同时才从平滑电路输出信号。 该输出信号是色度信号运动检测信号。 使用梳状滤波器从视频信号中去除包含在视频信号中的亮度信号。

    Motion detector for chrominance signal in TV receiver
    4.
    发明授权
    Motion detector for chrominance signal in TV receiver 失效
    电视接收机色度信号运动检测器

    公开(公告)号:US4775888A

    公开(公告)日:1988-10-04

    申请号:US143336

    申请日:1988-01-13

    IPC分类号: H04N5/14 H04N9/64 H04N5/21

    CPC分类号: H04N5/144

    摘要: A motion detector for a chrominance signal which is used with a TV receiver equipped with a video signal motion detector. This motion detector for a chrominance signal has a delay element for delaying the chrominance signal of a video signal by 1 frame period, a subtracter for subtracting the output signal of the delay element from the input signal thereof, an absolute value conversion circuit to which the output signal from the subtracter is inputted, and a smoother circuit to which the output signal from the absolute value conversion circuit is supplied. If the chrominance signal of video signals on two consecutive frames are the same, the output signal of the subtracter becomes zero. If the chrominance signals of video signals on two consecutive frames are different, the output signal of the subtracter takes a positive or negative value. The negative value signal is converted into a positive value signal by the absolute value conversion circuit. A signal is outputted from the smoother circuit only when the chrominance signals of video signals on two consecutive frames are different. This outputted signal is a chrominance signal motion detection signal.The luminance signal contained in a video signal is removed from the video signal using a comb-type filter.

    摘要翻译: 用于与配备有视频信号运动检测器的TV接收机一起使用的色度信号的运动检测器。 用于色度信号的运动检测器具有用于将视频信号的色度信号延迟1帧周期的延迟元件,用于从其输入信号中减去延迟元件的输出信号的减法器,绝对值转换电路, 输入来自减法器的输出信号,并且提供来自绝对值转换电路的输出信号的平滑电路。 如果两个连续帧上的视频信号的色度信号相同,则减法器的输出信号变为零。 如果两个连续帧上的视频信号的色度信号不同,则减法器的输出信号取正值或负值。 负值信号由绝对值转换电路转换为正值信号。 仅当两个连续帧上的视频信号的色度信号不同时才从平滑电路输出信号。 该输出信号是色度信号运动检测信号。 使用梳状滤波器从视频信号中去除包含在视频信号中的亮度信号。

    Separating circuit of luminance and chrominance signals for TV receiver
selecting between three three line comb filters
    6.
    发明授权
    Separating circuit of luminance and chrominance signals for TV receiver selecting between three three line comb filters 失效
    电视接收机的亮度和色度信号分离电路在三个三线梳状滤波器之间进行选择

    公开(公告)号:US4707732A

    公开(公告)日:1987-11-17

    申请号:US918037

    申请日:1986-10-14

    IPC分类号: H04N9/78

    CPC分类号: H04N9/78

    摘要: A circuit for separating a luminance signal and a chrominance signal having the first, second, third, and fourth 1H delay lines each connected in series, a first comb filter including the first and second 1H delay lines, a second comb filter including the second and third 1H delay lines, a third comb filter including the third and fourth 1H delay lines, a first subtraction circuit for achieving a subtraction on an input signal to the first 1H delay line and an output signal from the second 1H delay line, a second subtraction circuit for achieving a subtraction on an input signal to the second 1H delay line and an output signal from the third 1H delay line, a third subtraction circuit for achieving a subtraction on an input signal to the third 1H delay line and an output signal from the fourth 1H delay line, and a minimum value detecting circuit connected to the first, second, and third subtraction circuits for detecting the minimum value from the subtraction results. This circuit selects by use of a switch an output signal from the comb filter for which the minimum subtraction result is detected by the minimum value detecting circuit and then outputs the selected signal. This circuit can appropriately separate the luminance and chrominance signals even in a case where the video signal includes a contour section.

    摘要翻译: 一种用于分离亮度信号和具有串联连接的第一,第二,第三和第四1H延迟线的色度信号的电路,包括第一和第二1H延迟线的第一梳状滤波器,包括第二和第二1H延迟线的第二梳状滤波器, 第三1H延迟线,包括第三和第四1H延迟线的第三梳状滤波器,用于实现对第一1H延迟线的输入信号的减法和来自第二1H延迟线的输出信号的第一减法电路,第二减法线 用于实现对第二1H延迟线的输入信号的减法和来自第三1H延迟线的输出信号的电路,用于实现对第三1H延迟线的输入信号的减法的第三减法电路和来自 第四1H延迟线和连接到第一,第二和第三减法电路的最小值检测电路,用于从减法结果中检测最小值。 该电路通过使用来自梳状滤波器的输出信号通过开关选择最小值检测电路检测到最小相减结果,然后输出所选择的信号。 即使在视频信号包括轮廓部分的情况下,该电路也可适当地分离亮度和色度信号。

    Television receiver
    7.
    发明授权
    Television receiver 失效
    电视接收机

    公开(公告)号:US4870490A

    公开(公告)日:1989-09-26

    申请号:US248375

    申请日:1988-09-23

    IPC分类号: H04N5/04 H04N5/12 H04N5/44

    CPC分类号: H04N5/126

    摘要: In a television receiver including a digital circuit processing an input video signal in a digital mode, a clock generating circuit applies a system clock signal to the digital circuit, and comprises a phase comparator to which a horizontal synchronizing signal is applied, a low-pass filter connected to the phase comparator, a voltage controlled oscillator connected to the low-pass filter to generate the system clock signal, a first frequency divider dividing the frequency of the system clock signal generated from the voltage controlled oscillator to generate a horizontal deflection drive pulse signal, and a second frequency divider connected to the phase comparator. The phase comparator, the low-pass filter, the voltage controlled oscillator, the first frequency divider and the second frequency divider constitute a single PLL circuit, and the system clock signal and the horizontal deflection drive pulse signal are respectively generated from the PLL circuit.

    摘要翻译: 在包括以数字模式处理输入视频信号的数字电路的电视接收机中,时钟产生电路将系统时钟信号施加到数字电路,并且包括施加水平同步信号的相位比较器,低通 滤波器连接到相位比较器,压控振荡器连接到低通滤波器以产生系统时钟信号,第一分频器分频从压控振荡器产生的系统时钟信号的频率,以产生水平偏转驱动脉冲 信号和连接到相位比较器的第二分频器。 相位比较器,低通滤波器,压控振荡器,第一分频器和第二分频器构成单个PLL电路,并且系统时钟信号和水平偏转驱动脉冲信号分别从PLL电路产生。